H01L2224/038

Metal to metal bonding for stacked (3D) integrated circuits

The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.

Metal to metal bonding for stacked (3D) integrated circuits

The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.

Metal to metal bonding for stacked (3D) integrated circuits

The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.

Metal to metal bonding for stacked (3D) integrated circuits

The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.

Metal to metal bonding for stacked (3D) integrated circuits

The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.

METHOD FOR BONDING SUBSTRATES
20170117247 · 2017-04-27 · ·

A method for bonding a first substrate with a second substrate by means of a connecting layer that is arranged between the substrates and that is comprised of a connecting material with the following steps: applying the connecting material to the first substrate and/or the second substrate in liquid form, and distributing the connecting material between the substrates by bringing the substrates closer and as a result forming the shape of the connecting layer with a thickness t.

METHOD FOR BONDING SUBSTRATES
20170117247 · 2017-04-27 · ·

A method for bonding a first substrate with a second substrate by means of a connecting layer that is arranged between the substrates and that is comprised of a connecting material with the following steps: applying the connecting material to the first substrate and/or the second substrate in liquid form, and distributing the connecting material between the substrates by bringing the substrates closer and as a result forming the shape of the connecting layer with a thickness t.

ELECTROSTATIC DISCHARGE PROTECTION APPARATUS AND PROCESS
20170053890 · 2017-02-23 ·

In a process, at least one circuit element is formed in a substrate. A conductive layer is formed over the substrate and in electrical contact with the at least one circuit element. Electrostatic charges are discharged from the substrate via the conductive layer.

ELECTRONIC APPARATUS AND METHOD FOR MANUFACTURING ELECTRONIC APPARATUS
20170047302 · 2017-02-16 · ·

An electronic apparatus includes: a first substrate; an electrode over the first substrate; a first conductor having a porous structure above the first substrate, the first conductor covering an upper surface and a side surface of the electrode; and an insulator above the first substrate, the insulator covering an upper surface and a side surface of the first conductor, wherein the insulator has an opening that exposes the first conductor.

ELECTRONIC APPARATUS AND METHOD FOR MANUFACTURING ELECTRONIC APPARATUS
20170047302 · 2017-02-16 · ·

An electronic apparatus includes: a first substrate; an electrode over the first substrate; a first conductor having a porous structure above the first substrate, the first conductor covering an upper surface and a side surface of the electrode; and an insulator above the first substrate, the insulator covering an upper surface and a side surface of the first conductor, wherein the insulator has an opening that exposes the first conductor.