H01L2224/10152

SEMICONDUCTOR DEVICE WITH DELAMINATION REDUCTION MECHANISM AND METHODS FOR MANUFACTURING THE SAME
20240282733 · 2024-08-22 ·

Methods, apparatuses, and systems related to a device having a delamination reduction mechanism disposed between a solder resist layer and a contact pad of a substrate. The substrate may include a solder opening in the solder resist layer over the contact pad. The delamination reduction mechanism may have bonding strengths relative to the solder resist layer and the contact pad that are greater than a bonding strength associated with a direct contact between the solder resist layer and the contact pad.

BUMP-FORMING FILM, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, AND CONNECTION STRUCTURE
20180218990 · 2018-08-02 · ·

A bump-forming film is used for forming, on a semiconductor device such as a bumpless IC chip, bumps which are low in cost and can achieve stable conduction reliability. The bump-forming film is configured such that conductive fillers for bumps are arranged regularly in a planar view in an insulating adhesive resin layer. The regular arrangement has a periodic repeating unit in the longitudinal direction of the film. The straight line which connects one ends of the conductive fillers for bumps in the thickness direction of the film is substantially parallel to the surface of the film.

ELECTRONIC PACKAGE

An electronic package includes a pad, a dielectric layer, a bump, and a conductive element. The dielectric layer encapsulates the pad and includes an opening exposing the pad. The bump is disposed over the pad. The conductive element is disposed in the opening between the pad and the bump. The conductive element is configured to mitigate a shrinkage of an electrical path between the pad and the bump occupied by an expansion of the dielectric layer.

MOLDED SPACER FOR SURFACE MOUNT TECHNOLOGY
20250259964 · 2025-08-14 ·

Methods, systems, and apparatus, for a molded spacer. In an aspect, a spacer comprises a core defining a top surface, a bottom surface, and one or more side surfaces; a molded covering that covers at least the top surface of the core, the molded covering comprising an insulation material, wherein the spacer has a cross sectional size to fit onto a depopulated connection pad of a ball grid array of a circuit board without interfering in a reflow soldering operation for solder balls placed on connection pads immediately adjacent to the depopulated connection pad.