H01L2224/111

Substrate bonding structure and substrate bonding method

A device (2) is formed on a main surface of a substrate (1). The main surface of the substrate (1) is bonded to the undersurface of the counter substrate (14) via the bonding member (11,12,13) in a hollow state. A circuit (17) and a bump structure (26) are formed on the top surface of the counter substrate (14). The bump structure (26) is positioned in a region corresponding to at least the bonding member (11,12,13), and has a higher height than that of the circuit (17).

Substrate bonding structure and substrate bonding method

A device (2) is formed on a main surface of a substrate (1). The main surface of the substrate (1) is bonded to the undersurface of the counter substrate (14) via the bonding member (11,12,13) in a hollow state. A circuit (17) and a bump structure (26) are formed on the top surface of the counter substrate (14). The bump structure (26) is positioned in a region corresponding to at least the bonding member (11,12,13), and has a higher height than that of the circuit (17).

EMBEDDED BRIDGE ARCHITECTURE WITH THINNED SURFACE

Embodiments disclosed herein include a multi-die packages with an embedded bridge and a thinned surface. In an example, a multi-die interconnect structure includes a package substrate having a cavity. A bridge die is in the cavity of the package substrate, the bridge die including silicon. A dielectric material is over the package substrate, over the bridge die, and in the cavity. A plurality of conductive bond pads is on the dielectric material. The multi-die interconnect structure further includes a plurality of conductive pillars, individual ones of the plurality of conductive pillars on a corresponding one of the plurality of conductive bond pads. A solder resist material is on the dielectric material, on exposed portions of the plurality of conductive bond pads, and laterally surrounding the plurality of conductive pillars. The plurality of conductive pillars has a top surface above a top surface of the solder resist material.

CONNECTION STRUCTURE
20210398931 · 2021-12-23 ·

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

CONNECTION STRUCTURE
20210398931 · 2021-12-23 ·

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

Connection structure
11735556 · 2023-08-22 · ·

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

Connection structure
11735556 · 2023-08-22 · ·

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

USE OF PRE-CHANNELED MATERIALS FOR ANISOTROPIC CONDUCTORS

A semiconductor device assembly has a first substrate, a second substrate, and an anisotropic conductive film. The first substrate includes a first plurality of connectors. The second substrate includes a second plurality of connectors. The anisotropic conductive film is positioned between the first plurality of connectors and the second plurality of connectors. The anisotropic conductive film has an electrically insulative material and a plurality of interconnects laterally separated by the electrically insulative material. The plurality of interconnects forms electrically conductive channels extending from the first plurality of connectors to the second plurality of connectors. A method includes connecting the plurality of interconnects to the first plurality of connectors and the second plurality of connectors, such that the electrically conductive channels are operable to conduct electricity from the first substrate to the second substrate. The method may include passing electrical current through the plurality of interconnects.

Fabrication method of high aspect ratio solder bumping with stud bump and injection molded solder, and flip chip joining with the solder bump

A technique for fabricating bumps on a substrate is disclosed. A substrate that includes a set of pads formed on a surface thereof is prepared. A bump base is formed on each pad of the substrate. Each bump base has a tip extending outwardly from the corresponding pad. A resist layer is patterned on the substrate to have a set of holes through the resist layer. Each hole is aligned with the corresponding pad and having space configured to surround the tip of the bump base formed on the corresponding pad. The set of the holes in the resist layer is filled with conductive material to form a set of bumps on the substrate. The resist layer is stripped from the substrate with leaving the set of the bumps.

Semiconductor device and method of manufacture

An interposer substrate is manufactured with a scribe line between adjacent regions. In an embodiment a separate exposure reticle is utilized to pattern the scribe line. The exposure reticle to pattern the scribe line will create an exposure region which overlaps and overhangs the exposure regions utilized to form adjacent regions.