Patent classifications
H01L2224/1147
BONDING STRUCTURES IN SEMICONDUCTOR PACKAGED DEVICE AND METHOD OF FORMING SAME
A semiconductor device and a method of forming the same are provided. The semiconductor device includes a die structure including a plurality of die regions and a plurality of first seal rings. Each of the plurality of first seal rings surrounds a corresponding die region of the plurality of die regions. The semiconductor device further includes a second seal ring surrounding the plurality of first seal rings and a plurality of connectors bonded to the die structure. Each of the plurality of connectors has an elongated plan-view shape. A long axis of the elongated plan-view shape of each of the plurality of connectors is oriented toward a center of the die structure.
Semiconductor Die Contact Structure and Method
A system and method for forming a semiconductor die contact structure is disclosed. An embodiment comprises a top level metal contact, such as copper, with a thickness large enough to act as a buffer for underlying low-k, extremely low-k, or ultra low-k dielectric layers. A contact pad or post-passivation interconnect may be formed over the top level metal contact, and a copper pillar or solder bump may be formed to be in electrical connection with the top level metal contact.
SEMICONDUCTOR DIE EMPLOYING REPURPOSED SEED LAYER FOR FORMING ADDITIONAL SIGNAL PATHS TO BACK END-OF-LINE (BEOL) STRUCTURE, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS
A semiconductor die (“die”) employing repurposed seed layer for forming additional signal paths to a back end-of-line (BEOL) structure of the die, and related integrated circuit (IC) packages and fabrication methods. A seed layer is repurposed that was disposed adjacent the BEOL interconnect structure to couple an under bump metallization (UBM) interconnect without a coupled interconnect bump thus forming an unraised interconnect bump, to a UBM interconnect that has a raised interconnect bump. To couple the unraised interconnect bump to the raised interconnect bump, the seed layer is selectively removed during fabrication to leave a portion of the seed layer repurposed that couples the UBM interconnect that does not have an interconnect bump to the UBM interconnect that has a raised interconnect bump. Additional routing paths can be provided between raised interconnect bumps to the BEOL interconnect structure through coupling of UBM interconnects to an unraised interconnect bump.
SEMICONDUCTOR DIE EMPLOYING REPURPOSED SEED LAYER FOR FORMING ADDITIONAL SIGNAL PATHS TO BACK END-OF-LINE (BEOL) STRUCTURE, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS
A semiconductor die (“die”) employing repurposed seed layer for forming additional signal paths to a back end-of-line (BEOL) structure of the die, and related integrated circuit (IC) packages and fabrication methods. A seed layer is repurposed that was disposed adjacent the BEOL interconnect structure to couple an under bump metallization (UBM) interconnect without a coupled interconnect bump thus forming an unraised interconnect bump, to a UBM interconnect that has a raised interconnect bump. To couple the unraised interconnect bump to the raised interconnect bump, the seed layer is selectively removed during fabrication to leave a portion of the seed layer repurposed that couples the UBM interconnect that does not have an interconnect bump to the UBM interconnect that has a raised interconnect bump. Additional routing paths can be provided between raised interconnect bumps to the BEOL interconnect structure through coupling of UBM interconnects to an unraised interconnect bump.
SEMICONDUCTOR INTERCONNECT STRUCTURES WITH CONDUCTIVE ELEMENTS, AND ASSOCIATED SYSTEMS AND METHODS
Semiconductor devices having interconnect structures with conductive elements configured to mitigate thermomechanical stresses, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a semiconductor die and a pillar structure coupled to the semiconductor die. The pillar structure can include a plurality of conductive elements made of a first conductive material having a first elastic modulus. The pillar structure can further include a continuous region of a second conductive material at least partially surrounding the plurality of conductive elements. The second conductive material can have a second elastic modulus less than the first elastic modulus.
BONDING STRUCTURES AND METHODS FOR FORMING THE SAME
A bonding structure is provided, wherein the bonding structure includes a first substrate, a second substrate, a first adhesive layer, a second adhesive layer, and a silver feature. The second substrate is disposed opposite to the first substrate. The first adhesive layer is disposed on the first substrate. The second adhesive layer is disposed on the second substrate and opposite the first adhesive layer. The silver feature is disposed between the first adhesive layer and the second adhesive layer. The silver feature includes a silver nano-twinned structure that includes twin boundaries that are arranged in parallel. The parallel-arranged twin boundaries include 90% or more [111] crystal orientation.
BONDING STRUCTURES AND METHODS FOR FORMING THE SAME
A bonding structure is provided, wherein the bonding structure includes a first substrate, a second substrate, a first adhesive layer, a second adhesive layer, and a silver feature. The second substrate is disposed opposite to the first substrate. The first adhesive layer is disposed on the first substrate. The second adhesive layer is disposed on the second substrate and opposite the first adhesive layer. The silver feature is disposed between the first adhesive layer and the second adhesive layer. The silver feature includes a silver nano-twinned structure that includes twin boundaries that are arranged in parallel. The parallel-arranged twin boundaries include 90% or more [111] crystal orientation.
Device for measuring bump height, apparatus for processing substrate, method of measuring bump height, and storage medium
An object is to allow for simple measurement of a bump height. There is provided a device for measuring a bump height comprising: a light sensor provided with a light source and a light-receiving element and configured to irradiate a substrate including a seed layer, a resist layer formed on the seed layer and a bump formed in an opening of the resist layer, with light emitted from the light source and to detect reflected light that is reflected from the seed layer via the resist layer and reflected light that is reflected from the bump, by the light-receiving element; and a control device configured to calculate a height of the bump relative to the seed layer, based on the reflected light from the seed layer and the reflected light from the bump and to subtract an error caused by a refractive index of the resist layer from the height of the bump calculated based on the reflected lights, so as to correct the height of the bump.
Device for measuring bump height, apparatus for processing substrate, method of measuring bump height, and storage medium
An object is to allow for simple measurement of a bump height. There is provided a device for measuring a bump height comprising: a light sensor provided with a light source and a light-receiving element and configured to irradiate a substrate including a seed layer, a resist layer formed on the seed layer and a bump formed in an opening of the resist layer, with light emitted from the light source and to detect reflected light that is reflected from the seed layer via the resist layer and reflected light that is reflected from the bump, by the light-receiving element; and a control device configured to calculate a height of the bump relative to the seed layer, based on the reflected light from the seed layer and the reflected light from the bump and to subtract an error caused by a refractive index of the resist layer from the height of the bump calculated based on the reflected lights, so as to correct the height of the bump.
METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.