A semiconductor fabrication apparatus has a transfer plate having a plurality of transfer pins to transfer a flux onto a plurality of lands on a semiconductor substrate, a holder movable with the transfer plate, to hold the transfer plate, a positioning mechanism to perform positioning of the holder so that the plurality of lands and the respective transfer pins contact each other; and a pitch adjuster to adjust a pitch of at least part of the plurality of transfer pins.

A multi-layer semiconductor structure includes a first semiconductor structure and a second semiconductor structure, with at least one of the first and second semiconductor structures provided as a superconducting semiconductor structure. The multi-layer semiconductor structure also includes one or more interconnect structures. Each of the interconnect structures is disposed between the first and second semiconductor structures and coupled to respective ones of interconnect pads provided on the first and second semiconductor structures. Additionally, each of the interconnect structures includes a plurality of interconnect sections. At least one of the interconnect sections includes at least one superconducting and/or a partially superconducting material.

Methods of reflowing electrically conductive elements on a wafer may involve directing a laser beam toward a region of a surface of a wafer supported on a film of a film frame to reflow at least one electrically conductive element on the surface of the wafer. In some embodiments, the wafer may be detached from a carrier substrate and be secured to the film frame before laser reflow. Apparatus for performing the methods, and methods of repairing previously reflowed conductive elements on a wafer are also disclosed.

Provided is a plating apparatus for plating a substrate by using a substrate holder including an elastic projection that seals a to-be-plated surface of the substrate, the plating apparatus comprising a measurement device configured to measure a deformed state of the elastic projection by measuring at least either one of a compression amount of the elastic projection and load applied to the elastic projection at a time when the substrate physically contacts the elastic projection of the substrate holder; and a controlling device configured to make a judgment on the basis of the measured deformed state as to whether sealing by the elastic projection is normal.

A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.

A plating product fabrication method includes forming a first concentrate. The concentrate includes a metal species, such as Tin, and a trace amount of an alpha emitting species, such as Polonium. The plating product fabrication method also includes creating a circuit between a filtering anode and a filtering cathode and reducing the alpha emitting species from the concentrate by plating the alpha emitting species upon the filtering cathode. In this manner, a purified concentrate is formed. The purified concentrate may be utilized to plate the metal species upon a plating cathode. The purified concentrate may be utilized to form a purified metal species.

Provided is a plating apparatus for plating a substrate by using a substrate holder including an elastic projection that seals a to-be-plated surface of the substrate, the plating apparatus comprising a measurement device configured to measure a deformed state of the elastic projection by measuring at least either one of a compression amount of the elastic projection and load applied to the elastic projection at a time when the substrate physically contacts the elastic projection of the substrate holder; and a controlling device configured to make a judgment on the basis of the measured deformed state as to whether sealing by the elastic projection is normal.

A cryogenic electronic package includes at least two superconducting and/or conventional metal semiconductor structures. Each of the semiconductor structures includes a substrate and a superconducting trace. Additionally, each of the semiconductor structures includes a passivation layer and one or more under bump metal (UBM) structures. The cryogenic electronic package also includes one or more superconducting and/or conventional metal interconnect structures disposed between selected ones of the at least two superconducting semiconductor structures. The interconnect structures are electrically coupled to respective ones of the UBM structures of the semiconductor structures to form one or more electrical connections between the semiconductor structures. A method of fabricating a cryogenic electronic package is also provided.

Methods and systems for manufacturing and analyzing interconnect structures in integrated circuit (IC) devices. The methods include forming an interconnect structure, such as a pillar, in an IC device. The pillar is analyzed using an opto-acoustic sensor to quantify physical characteristics used to determine whether the pillar satisfies predetermined quality criterion. The analysis includes capturing an opto-acoustic signal from the pillar and estimating optical parameters for a number of local maxima of the signal. A mode may then be fitted for each of the identified local maxima based on the optical characteristics. The modes and estimated optical parameters may then be iteratively corrected in an order from strongest to weakest local maximum. The corrected values may then be compared to a predicted physical model to identify the physical characteristics of the pillar. If the physical characteristics fall outside of the quality criterion, manufacturing processes may be altered.

A system for the flux free processing of a plurality of solder balls on a wafer, comprising: an articulable vacuum support chuck for maintaining support of a plurality of solder balls on a wafer being processed. An articulable flux-free binder applicator arranged in binder depositing relationship with the wafer within the treatment chamber. An articulable fluid dispenser is arranged in a binder-applied minimization-treatment with respect to the flux free binder applied to the wafer within the treatment chamber.