A display device is provided. The display device includes a substrate, a driving circuit disposed on the substrate, and a light-emitting unit disposed on the driving circuit and electrically connected to the driving circuit. The light-emitting unit includes a first semiconductor layer, a quantum well layer disposed on the first semiconductor layer and a second semiconductor layer disposed on the quantum well layer. The second semiconductor layer includes a first top surface. The display device also includes a first protective layer disposed on the driving circuit and adjacent to the light-emitting unit. The first protective layer includes a second top surface and a plurality of conductive elements formed therein. The elevation of the first top surface is higher than the elevation of the second top surface.

High-performance light-emitting diode together with apparatus and method embodiments thereto are disclosed. The light emitting diode devices emit at a wavelength of 390 nm to 470 nm or at a wavelength of 405 nm to 430 nm. Light emitting diode devices are characterized by having a geometric relationship (e.g., aspect ratio) between a lateral dimension of the device and a vertical dimension of the device such that the geometric aspect ratio forms a volumetric light emitting diode that delivers a substantially flat current density across the device (e.g., as measured across a lateral dimension of the active region). The light emitting diode devices are characterized by having a current density in the active region of greater than about 175 Amps/cm.sup.2.

A method for manufacturing a light emitting device includes: roughening a light extracting surface of a semiconductor light emitting element, forming a first light transmissive layer on an entirety of the roughened light extracting surface, flattening a surface of a first light transmissive layer that is on a side opposite the semiconductor light emitting element, forming a second light transmissive layer on an entirety of a surface of an optical member, flattening a surface of the second light transmissive layer that is on a side opposite the optical member, and directly bonding the flattened surface of the first light transmissive layer and the flattened surface of second transmissive layer by performing surface-activated bonding, atomic diffusion bonding, or hydroxyl bonding.

A method of manufacture for a semiconductor package includes; forming a molding member on side surfaces of the semiconductor chips, using an adhesive to attach a carrier substrate to upper surfaces of the molding member and the semiconductor chips, using a first blade having a first blade-width to cut away selected portions of the carrier substrate and portions of the adhesive underlying the selected portions of the carrier substrate, and using the first blade to partially cut into an upper surface of the molding member to form a first cutting groove, wherein the selected portions of the carrier substrate are dispose above portions of the molding member between adjacent ones of semiconductor chips, using a second blade having a second blade-width narrower than the first blade-width to cut through a lower surface of the molding member to form a second cutting groove, wherein a combination of the first cutting groove and the second cutting groove separate a package structure including a semiconductor chip supported by a cut portion of the carrier substrate and bonding the package structure to an upper surface of a package substrate.

An electronic device and associated methods are disclosed. In one example, the electronic device can include a semiconductor package including a package substrate, a first semiconductor die on the package substrate, a second semiconductor die on the package substrate, a third semiconductor die on the package substrate, and a bridge interconnect at least partially embedded in the package substrate. The bridge interconnect can include a first bridge section coupling the first semiconductor die to the second semiconductor die, a second bridge section coupling the second semiconductor die to the third semiconductor die, and a power-ground section between the first section and the second section, the power-ground section comprising first and second conductive traces coupled to the second semiconductor die.

A microelectronic structure includes a substrate having a first surface and a cavity extending into the substrate from the substrate first surface, a first microelectronic device and a second microelectronic device attached to the substrate first surface, and a bridge disposed within the substrate cavity and attached to the first microelectronic device and to the second microelectronic device. The bridge includes a plurality conductive vias extending from a first surface to an opposing second surface of the bridge, wherein the conductive vias are electrically coupled to deliver electrical signals from the substrate to the first microelectronic device and the second microelectronic device. The bridge further creates at least one electrical signal connection between the first microelectronic device and the second microelectronic device.

An illumination device includes a supporting base, and a light-emitting element inserted in the supporting base. The light-emitting element includes a substrate having a supporting surface and a side surface, a light-emitting chip disposed on the supporting surface, and a first wavelength conversion layer covering the light-emitting chip and only a portion of the supporting surface without covering the side surface.

Alternative surfaces for conductive pad layers of silicon bridges for semiconductor packages, and the resulting silicon bridges and semiconductor packages, are described. In an example, a semiconductor structure includes a substrate having a lower insulating layer disposed thereon. The substrate has a perimeter. A metallization structure is disposed on the lower insulating layer. The metallization structure includes conductive routing disposed in a dielectric material stack. First and second pluralities of conductive pads are disposed in a plane above the metallization structure. Conductive routing of the metallization structure electrically connects the first plurality of conductive pads with the second plurality of conductive pads. An upper insulating layer is disposed on the first and second pluralities of conductive pads. The upper insulating layer has a perimeter substantially the same as the perimeter of the substrate.

A light-emitting diode (LED) display array, a manufacturing method thereof and a wearable device are provided. The LED display array comprises a first substrate and a second substrate arranged oppositely to each other. At least one pixel unit is formed on a surface of the first substrate facing the second substrate. At least one drive unit is formed on a surface of the second substrate facing the first substrate. Each pixel unit on the first substrate corresponds to a drive unit on the second substrate. A metal block is formed between each pixel unit and the drive unit corresponding to the pixel unit. The pixel unit is electrically connected with the drive unit corresponding to the pixel unit through the metal block.

A composite substrate has: a first substrate having a first bump protruding therefrom; and a second substrate having a first surface in contact with the first bump, and a second surface opposite to the first surface, the second surface having a second bump protruding therefrom, the second substrate being laminated on the first substrate in a thickness direction perpendicular to the first surface. The first bump and the second bump are partially overlapped with each other as viewed in the thickness direction. The second bump has a rigidity which is lower than a rigidity of the first bump.