Patent classifications
H01L2224/24
Electrically parallel fused LEDs
An LED component comprises a plurality of fused light-emitting diodes (LEDs) (e.g., micro-transfer printable or micro-transfer printed LEDs). Each fused LED comprises an LED with first and second LED electrical connections for providing power to the LED and a fuse with first and second fuse electrical connections. The first LED electrical connection is electrically connected to the first electrode. The first fuse electrical connection is electrically connected to the second LED electrical connection and the second fuse electrical connection is electrically connected to the second electrode. A fused LED source wafer comprises an LED wafer having a patterned sacrificial layer forming an array of sacrificial portions separated by anchors and a plurality of fused LED components, each fused LED component disposed entirely on or over a corresponding sacrificial portion. A light-emission system comprises a system substrate and a plurality of fused LED components disposed on or over the system substrate.
TRANSVERSE BULK ACOUSTIC WAVE FILTER
A micro-transfer printable transverse bulk acoustic wave filter comprises a piezoelectric filter element having a top side, a bottom side, a left side, and a right side disposed over a sacrificial portion on a source substrate. A top electrode is in contact with the top side and a bottom electrode is in contact with the bottom side. A left acoustic mirror is in contact with the left side and a right acoustic mirror is in contact with the right side. The thickness of the transverse bulk acoustic wave filter is substantially less than its length or width and its length can be greater than its width. The transverse bulk acoustic wave filter can be disposed on, and electrically connected to, a semiconductor substrate comprising an electronic circuit to control the transverse bulk acoustic wave filter and form a composite heterogeneous device that can be micro-transfer printed.
Secure integrated-circuit systems
A method of making a secure integrated-circuit system comprises providing a first integrated circuit in a first die having a first die size and providing a second integrated circuit in a second die. The second die size is smaller than the first die size. The second die is transfer printed onto the first die and connected to the first integrated circuit, forming a compound die. The compound die is packaged. The second integrated circuit is operable to monitor the operation of the first integrated circuit and provides a monitor signal responsive to the operation of the first integrated circuit. The first integrated circuit can be constructed in an insecure facility and the second integrated circuit can be constructed in a secure facility.
Secure integrated-circuit systems
A method of making a secure integrated-circuit system comprises providing a first integrated circuit in a first die having a first die size and providing a second integrated circuit in a second die. The second die size is smaller than the first die size. The second die is transfer printed onto the first die and connected to the first integrated circuit, forming a compound die. The compound die is packaged. The second integrated circuit is operable to monitor the operation of the first integrated circuit and provides a monitor signal responsive to the operation of the first integrated circuit. The first integrated circuit can be constructed in an insecure facility and the second integrated circuit can be constructed in a secure facility.
Chip package structure and manufacturing method therefor
A chip package structure can include: a lead frame having a carrier substrate and a first lead around the carrier substrate; a first conductive post arranged on the first lead and electrically coupled with the first lead; a first chip having an active face and an inactive face opposite to the active face and attached to the carrier substrate, and electrode pads on the active face are provided with a first electrical connector; a first plastic package configured to fully encapsulate the first chip, and to partly encapsulate the lead frame, where the first plastic package includes a first surface and a second surface opposite to the first surface, where the first conductive post and the first electrical connector are exposed on the first surface, and where the first lead is exposed on the second surface, and a second lead being arranged on the first surface.
QUASI-VERTICAL DIODE WITH INTEGRATED OHMIC CONTACT BASE AND RELATED METHOD THEREOF
A quasi-vertical Schottky diode architecture includes a topside anode contact that connects to external circuitry through an airbridge finger, a thin mesa of semiconductor material with epilayers including a bottomside highly-doped layer, a bottomside ohmic contact directly below the anode, and a host substrate onto which the diode material is bonded by a thin adhesive layer. A method of fabricating the diode architecture includes preparation of the semiconductor wafer for processing (including initial etching to expose the highly-doped epilayer, deposition of metals and annealing to form the ohmic contact, application of the adhesive layer to the host substrate, thermal compression bonding of diode wafer and host wafer, with ohmic contact side facing host wafer to form a composite wafer, etching and formation of diode mesas to isolate devices on the host substrate, lithography and formation of topside anode contact and external circuitry on host wafer).
MICRO-TRANSFER-PRINTED ACOUSTIC WAVE FILTER DEVICE
A compound acoustic wave filter device comprises a support substrate having an including two or more circuit connection pads. An acoustic wave filter includes a piezoelectric filter element and two or more electrodes. The acoustic wave filter is micro-transfer printed onto the support substrate. An electrical conductor electrically connects one or more of the circuit connection pads to one or more of the electrodes.
TECHNIQUES FOR FORMING SEMICONDUCTOR DEVICE PACKAGES AND RELATED PACKAGES, INTERMEDIATE PRODUCTS, AND METHODS
Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Conductors may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The conductors may be in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device and between the conductors and the second semiconductor device. An encapsulant distinct from the dielectric material may cover the conductors, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate. Methods of fabrication are also disclosed.
TECHNIQUES FOR FORMING SEMICONDUCTOR DEVICE PACKAGES AND RELATED PACKAGES, INTERMEDIATE PRODUCTS, AND METHODS
Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Conductors may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The conductors may be in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device and between the conductors and the second semiconductor device. An encapsulant distinct from the dielectric material may cover the conductors, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate. Methods of fabrication are also disclosed.
Electronic Component, Optoelectronic Component, Component Arrangement, and Method for Producing an Electronic Component
An electronic component, an optoelectronic component, a component arrangement, and a method for producing an electronic component are disclosed. In an embodiment, the method includes forming a sacrificial structure on a top side of a carrier by a photolithographic process from a photoresist layer, arranging an electronic semiconductor chip on the carrier after exposing the photoresist layer, molding a molded body around the sacrificial structure and around the electronic semiconductor chip such that a surface of the electronic semiconductor chip is at least partly not covered by the molded body, detaching the molded body from the carrier and removing the sacrificial structure, wherein removing the sacrificial structure results in a cutout being formed in the molded body.