A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.

In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.

A power die package includes a power die having a plurality of bond pads at an upper surface of the power die. The package further includes a plurality of contact structures. A contact structure includes: a bond wire bonded to one of the plurality of bond pads and folded back to the bond pad to form a closed loop, or at least three bumps laterally spaced from one another and disposed on one or more bond pads; and a continuous longitudinally extended electrically conductive element connected to the at least three bumps in at least three contact positions. The conductive element bends away from the power die between pairs of consecutive contact positions. The package further includes a mold compound partially encapsulating the contact structure. The mold compound includes an outer surface facing away from the power die. The contact structure is partially exposed at the outer surface.

A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.

A semiconductor device includes: a first semiconductor chip mounted on a chip mounting portion via a first bonding material; and a second semiconductor chip mounted on the first semiconductor chip. Here, the first semiconductor chip has: a protective film located in an uppermost layer; and a first pad electrode exposed from the protective film at an inside of a first opening portion of the protective film. Also, the second semiconductor chip is mounted on a conductive material, which is arranged on the first pad electrode of the first semiconductor chip, via a second bonding material of an insulative property.

A semiconductor device includes a semiconductor die, and a topside metallization on a first side of the semiconductor die. The topside metallization includes a metal layer on the semiconductor die, the metal layer having a first thickness, and at least two discrete bond pads on the metal layer. The discrete bond pads have a second thickness that is larger than the first thickness. A backside metallization may be formed on the back side of the semiconductor die. The backside metallization includes a metal layer having a first portion having a first thickness and a second portion having a second thickness that is smaller than the first thickness.

An electronic component includes at least three terminals extending from a component package. The component includes a depletion-mode III-N transistor, and an enhancement-mode transistor in the package. A gate electrode of the enhancement-mode transistor is electrically connected to the first terminal, a source electrode of the enhancement-mode transistor and a gate electrode of the depletion-mode III-N transistor are electrically connected to the second terminal, a drain electrode of the enhancement-mode transistor is electrically connected to a source electrode of the depletion-mode III-N transistor, and a drain electrode of the depletion-mode III-N transistor is electrically connected to the third terminal. The drain electrode includes multiple drain pads each sequentially a further distance from the third terminal, where a wire-bond extends from each drain pad to the third terminal, each wire-bond having a length, where a diameter of the longest wire-bond is greater than the diameter of the shortest wire-bond.

Apparatuses disclosed herein are configured to support temperature sensing, including on-die temperature sensing, within an electronic component. An illustrative apparatus may include a substrate, a semiconductor die disposed on the substrate, a leadless temperature sensor, and a plurality of leads including at least a first lead and a second lead. The semiconductor die may implement a transistor and the leadless temperature sensor may be configured to measure a temperature of the transistor, in some cases by being disposed directly on the semiconductor die. The first lead may be electrically coupled with a first surface of the leadless temperature sensor while the second lead may be electrically coupled with a second surface of the leadless temperature sensor. Corresponding methods for fabricating such apparatuses are also disclosed.