Disclosed is a lighting system including: a board; a wiring pattern that is provided on a surface of the board and has a wiring pad; a light emitting element that is provided on the wiring pattern and includes an electrode on a surface thereof opposite to a surface thereof provided on the wiring pattern; a surrounding wall member that is provided to surround the light emitting element; a wiring that connects the wiring pad and the electrode; and a sealing portion that is provided inside the surrounding wall member and covers the light emitting element and the wiring. Here, an angle that is formed by a segment that connects a central position of a portion of the board surrounded by the surrounding wall member and a position where the wiring is connected to the wiring pad, and the wiring is 0 to 45, or 135 to 180.

A semiconductor device is disclosed. The semiconductor device has a semiconductor chip, an island having an upper surface to which the semiconductor chip is bonded, a lead disposed around the island, a bonding wire extended between the surface of the semiconductor chip and the upper surface of the lead, and a resin package sealing the semiconductor chip, the island, the lead, and the bonding wire, while the lower surface of the island and the lower surface of the lead are exposed on the rear surface of the resin package, and the lead is provided with a recess concaved from the lower surface side and opened on a side surface thereof.

To suppress appearance of a ghost. The present optical module includes a sensor configured to pick up an image of an image pickup object, and a memory chip configured to store pixel data read out from the sensor and having the sensor joined thereto. The memory chip is connected to a substrate by a connection portion by flip-chip connection. The sensor can be connected by a wire to the memory chip, to which the sensor is joined. Further, the sensor can be joined to the memory chip in such a manner as to project toward an opening of the substrate. The present technology can be applied to a camera module.

Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are disclosed. In some embodiments, the flexibly-wrapped integrated circuit die device includes a substrate and a flexible integrated circuit die coupled to the substrate in a substantially vertical orientation with reference to a surface of the substrate.

A system-in-package module includes a non-memory chip, a bundled memory, and an encapsulation package material. The non-memory chip has a plurality of pads. The bundled memory includes a first memory die and a second memory die side-by-side formed over a substrate, wherein the first memory die includes a first group of pads and the second memory die includes a second group of pads. The encapsulation package material encloses the non-memory chip and the bundled memory, and the non-memory chip is electronically coupling with the bundled memory through the plurality of pads, the first and the second group of pads. The first group of pads corresponds to the second group of pads by rotating a predetermined degree or by mirror mapping.

A method of manufacturing package carrier is provided. In the method, a holding substrate and a conductive layer are provided. The conductive layer is on the holding substrate. Next, an insulating pattern is formed on the conductive layer. The insulating pattern exposes a portion of the conductive layer. A supporting board is provided. Next, the insulating pattern is detachably fixed in the supporting board. After the insulating pattern is detachably fixed in the supporting board, the holding substrate is removed, and the conductive layer remains. After removing the holding substrate, the conductive layer is patterned to form a wiring layer.

A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame.

A semiconductor device includes a semiconductor chip, which includes a substrate, a multilayer interconnect layer formed over the substrate, a first cell column disposed along an edge of the substrate in a plan view, the first cell column having a first I/O cell and a first power supply cell, second cell column disposed along the first cell column in plan view, the second cell column having a second I/O cell, a first pad supplying a first supply voltage to the first power supply cell, a first voltage supply wire disposed over the first cell column, a second voltage supply wire disposed over the second cell column, and a first connection wire crossing the first voltage supply wire and the second voltage supply wire.

A semiconductor device includes a semiconductor chip, which includes a substrate, a multilayer interconnect layer formed over the substrate, a first cell column disposed along an edge of the substrate in a plan view, the first cell column having a first I/O cell and a first power supply cell, second cell column disposed along the first cell column in plan view, the second cell column having a second I/O cell, a first pad supplying a first supply voltage to the first power supply cell, a first voltage supply wire disposed over the first cell column, a second voltage supply wire disposed over the second cell column, and a first connection wire crossing the first voltage supply wire and the second voltage supply wire.

An object is to provide a technique callable of determining whether or not a wire is nearly broken. A semiconductor device includes a semiconductor element, a terminal, a main wire electrically connected between the semiconductor element and the terminal, a dummy wire, and sealing resin. Both ends of the dummy wire are connected to portions where both ends of the main wire are connected, and tensile strength of the dummy wire itself is lower than that of the main wire itself. The sealing resin covers the semiconductor element, the main wire, and the dummy wire.