H01L2224/73203

Integrated circuit chip assembled on an interposer

A device includes a chip assembled on an interposer. An electrically-insulating layer coats an upper surface of the interposer around the chip. First metal lines run on the upper surface of the interposer and are arranged between conductive elements of connection to the chip. An end of each first metal line is arranged to extend beyond a projection of the chip on the interposer. A thermally-conductive via connects the end of the first metal line to a heat sink supported at an upper surface of the device.

Wireless communication device with joined semiconductors

A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.

Method for fabricating an electronic device comprising forming an infused adhesive and a periperal ring

A method for fabricating an electronic device includes fixing a rear face of an integrated-circuit chip to a front face of a support wafer. An infused adhesive is applied in the form of drops or segments that are separated from each other. A protective wafer is applied to the infused adhesive, and the infused adhesive is cured. The infused adhesive includes a curable adhesive and solid spacer elements infused in the curable adhesive. A closed intermediate peripheral ring is deposited on the integrated-circuit chip outside the cured infused adhesive, and an encapsulation block is formed such that it surrounds the chip, the protective wafer and the closed intermediate peripheral ring.

Semiconductor device including semiconductor chips stacked over substrate
09748204 · 2017-08-29 · ·

According to the present invention, a semiconductor device includes a substrate including a first surface and a second surface opposite to the first surface, a first layer formed over the first surface, a second layer thicker than the first layer formed over the first portion of the first layer, the first and second layers being formed of a same material, a first semiconductor chip mounted over a second portion of the first layer; and a second semiconductor chip commonly mounted over the first semiconductor chip and the second layer.

Semiconductor package including interposer

A semiconductor package includes a base package substrate, a first semiconductor chip, and a second semiconductor chip. The base package substrate includes a redistribution region where a redistribution layer is provided, a plurality of vertical conductive vias connected to the redistribution layer, and a recess region recessed from an upper surface of the redistribution region. The base package substrate further includes an interposer in the recess region, the interposer comprising a substrate, a plurality of upper pads disposed at an upper surface of the substrate, and plurality of through electrodes respectively connected to the plurality of upper pads to pass through the substrate. The first semiconductor chip and second semiconductor chip, each include a plurality of conductive interconnection terminals respectively connected to the plurality of upper pads and the vertical conductive vias exposed at the upper surface of the redistribution region. The first semiconductor chip and the second semiconductor chip are mounted on the extension region and the interposer and disposed horizontally apart from each other. As seen from a plan view, the interposer is disposed to overlap a portion of each of the first semiconductor chip and the second semiconductor chip.

DISPLAY APPARATUS INCLUDING A MICRO LIGHT-EMITTING DIODE
20170243860 · 2017-08-24 ·

A display apparatus includes a semiconductor substrate, a transistor, and a light-emitting diode. The transistor is disposed on the semiconductor substrate and uses a portion of the semiconductor substrate as an active layer thereof. The light-emitting diode is disposed on the semiconductor substrate and is electrically connected to the transistor.

Microelectronic device with embedded die substrate on interposer

Microelectronic devices with an embedded die substrate on an interposer are described. For example, a microelectronic device includes a substrate housing an embedded die. At least one surface die is retained above a first outermost surface of the substrate. An interposer is retained proximate a second outermost surface of the substrate.

Chip package device

A chip package device includes a chip, and a first substrate and a second substrate that are disposed opposite to each other, where the chip is disposed on a surface that is of the first substrate and that faces the second substrate. The chip is electrically connected to the first substrate through a first conductive part, the first substrate is electrically connected to the second substrate through a second conductive part, and a heat dissipation passage is formed between the chip and the second substrate through a thermally conductive layer. The chip package device may further include a molding compound that is configured to wrap the chip. The thermally conductive layer disposed between the chip and the second substrate can quickly dissipate a large amount of heat generated by the chip to the second substrate so that the chip maintains a normal temperature.

Stacked chip-on-board module with edge connector
09735093 · 2017-08-15 · ·

A module can include a module card and first and second microelectronic elements having front surfaces facing a first surface of the module card. The module card can also have a second surface and a plurality of parallel exposed edge contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. Each microelectronic element can be electrically connected to the module card. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto.

Chip packages and methods of manufacture thereof

A chip package may include: a first die; at least one second die disposed over the first die; and a lid disposed over lateral portions of the first die and at least partially surrounding the at least one second die, the lid having inclined sidewalls spaced apart from and facing the at least one second die.