Patent classifications
H01L2224/73269
Image pickup apparatus having wiring board with alternately arranged flying leads
An image pickup apparatus includes: an image pickup device including a light receiving surface, an opposite surface, and an inclined surface inclined at a first angle, and provided with light receiving surface electrodes on the light receiving surface; a cover glass; and a wiring board including a first main surface and a second main surface, and including wires each connected with each of the light receiving surface electrodes, back surfaces of the light receiving surface electrodes are exposed to a side of the opposite surface, distal end portions of the wires are flying leads bent at a second angle in a relation of a supplementary angle to the first angle and connected with the light receiving surface electrodes, and the second main surface at a distal end portion of the wiring board is directly fixed to the opposite surface arranged in parallel with the second main surface.
FAN-OUT SEMICONDUCTOR PACKAGE
A fan-out semiconductor package includes: a core member having a first through-hole and including first and second wiring layer disposed on different levels; a first semiconductor chip disposed in the first through-hole; a second semiconductor chip disposed on the first semiconductor chip in the first through-hole so that a second inactive surface faces a first inactive surface; conductive wires disposed on the core member and a second active surface and electrically connecting second connection pads and the second wiring layer to each other; an encapsulant covering at least portions of the core member, the first semiconductor chip, the second semiconductor chip, and the conductive wires and filling at least portions of the first through-hole; and a connection member disposed on the core member and a first active surface and electrically connecting first connection pads and the first wiring layer to each other.
Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a substrate, a chip, a plurality of conductive bumps, a flexible printed circuit (FPC) board and a plurality of circuit patterns. The chip is disposed on the substrate and includes a plurality of pads. The conductive bumps are disposed on the pads respectively. The FPC board is connected between the substrate and the chip, and the conductive bumps penetrate through an end of the FPC board. The circuit patterns are disposed on the FPC board and electrically connected to the conductive bumps and the substrate.
Method of producing optoelectronic modules and an assembly having a module
A method produces a plurality of optoelectronic modules, and includes: A) providing a metallic carrier assembly with a plurality of carrier units; B) applying a logic chip, each having at least one integrated circuit, to the carrier units; C) applying emitter regions that generate radiation, which can be individually electrically controlled; D) covering the emitter regions and the logic chips with a protective material; E) overmolding the emitter regions and the logic chips so that a cast body is formed, which joins the carrier units, the logic chips and the emitter regions to one another; F) removing the protective material and applying electrical conductor paths to the upper sides of the logic chips and to a cast body upper side; and G) dividing the carrier assembly into the modules.
POWER ELECTRONICS ASSEMBLY HAVING AN ADHESION LAYER, AND METHOD FOR PRODUCING SAID ASSEMBLY
A power electronics method and assembly produced by the method. The assembly has a substrate, having a power semiconductor element, and an adhesion layer disposed therebetween, wherein the substrate has a first surface that faces a power semiconductor element, a power semiconductor element has a third surface that faces the substrate, the adhesion layer has a second surface which, preferably across the full area, contacts the third surface and has a first consistent surface contour having a first roughness, and wherein a fourth surface of the power semiconductor element that is opposite the third surface has a second surface contour having a second roughness, said second surface contour following the first surface contour.
Power electronic switching device, arrangement herewith and methods for producing the switching device
A switching device has a substrate and a power semiconductor component, comprising a connection device and a pressure device wherein the substrate has tracks electrically insulated from one another. The power semiconductor component is on one of the tracks with a first main surface and is conductively connected thereto. The device is embodied as a film composite having a conductive film and an insulating film that forms a first and a second main surface. The switching device is connected internally in a circuit-conforming manner by the connection device and a contact area of the connection device is connected to a first contact area of one of the tracks in a force-locking and electrically conductive manner. There is a pressure body projecting to the substrate and pressing onto a first section of the second main surface of the film composite.
SEMICONDUCTOR PACKAGE
A semiconductor package includes a base package substrate, a first semiconductor chip, and a second semiconductor chip. The base package substrate includes a redistribution region where a redistribution layer is provided, a plurality of vertical conductive vias connected to the redistribution layer, and a recess region recessed from an upper surface of the redistribution region. The base package substrate further includes an interposer in the recess region, the interposer comprising a substrate, a plurality of upper pads disposed at an upper surface of the substrate, and plurality of through electrodes respectively connected to the plurality of upper pads to pass through the substrate. The first semiconductor chip and second semiconductor chip, each include a plurality of conductive interconnection terminals respectively connected to the plurality of upper pads and the vertical conductive vias exposed at the upper surface of the redistribution region. The first semiconductor chip and the second semiconductor chip are mounted on the extension region and the interposer and disposed horizontally apart from each other. As seen from a plan view, the interposer is disposed to overlap a portion of each of the first semiconductor chip and the second semiconductor chip.
Integrated circuit
An integrated circuit includes a lead frame having a die attach paddle with a slot extending through the die attach paddle from a first surface to a second surface. A plurality of semiconductor die are positioned such that a channel is formed between the first, second, and third semiconductor die and the slot of the die attach paddle. A mold material encloses the plurality of semiconductor die and at least a portion of the lead frame and is disposed in the channel such that the second surface of the die attach paddle is substantially flush with the mold material. A method of forming an integrated circuit is also provided.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a substrate, a chip, a plurality of conductive bumps, a flexible printed circuit (FPC) board and a plurality of circuit patterns. The chip is disposed on the substrate and includes a plurality of pads. The conductive bumps are disposed on the pads respectively. The FPC board is connected between the substrate and the chip, and the conductive bumps penetrate through an end of the FPC board. The circuit patterns are disposed on the FPC board and electrically connected to the conductive bumps and the substrate.
IMAGE PICKUP APPARATUS
An image pickup apparatus includes: an image pickup device including a light receiving surface, an opposite surface, and an inclined surface inclined at a first angle, and provided with light receiving surface electrodes on the light receiving surface; a cover glass; and a wiring board including a first main surface and a second main surface, and including wires each connected with each of the light receiving surface electrodes, back surfaces of the light receiving surface electrodes are exposed to a side of the opposite surface, distal end portions of the wires are flying leads bent at a second angle in a relation of a supplementary angle to the first angle and connected with the light receiving surface electrodes, and the second main surface at a distal end portion of the wiring board is directly fixed to the opposite surface arranged in parallel with the second main surface.