The present invention provides a method for producing a semiconductor device, including: a semiconductor chip-mounting step of subsequently pressing a plurality of semiconductor chips by a first pressing member to respectively bond the plurality of semiconductor chips to a plurality of mounting areas provided on a substrate, wherein the bonding is performed in a state where adhesive sheets are respectively interposed between the plurality of semiconductor chips and the plurality of mounting areas, each of the adhesive sheets includes sinterable metal particles that can be sintered by heating at a temperature of 400° C. or less, and the first pressing member is heated to a temperature, at which the sinterable metal particles can be sintered.

A radiative heat collective bonder or gangbonder for packaging a semiconductor die stack is provided. The bonder generally includes a shroud positioned at least partially around the die stack and a radiative heat source positioned inward of the shroud and configured to emit a radiative heat flux in a direction away from the shroud. The bonder may further include a bondhead configured to contact the backside of the topmost die in the die stack and optionally include another bondhead configured to contact a substrate beneath the die stack. The radiative heat source may be configured to direct the radiative heat flux to at least a portion of the die stack to reduce a vertical temperature gradient in the die stack. One or both of the bondheads may be configured to concurrently direct a conductive heat flux into the die stack.

In an embodiment, a system includes: a circular frame comprising a first side and a second side opposite the first side, wherein the circular frame comprises an aperture formed therethrough; an insert disposed within the aperture; a first wafer disposed over the insert; a second wafer disposed over the first wafer, wherein both the first wafer and the second wafer are configured for eutectic bonding when heated; two clamps disposed on the first side along the circular frame, wherein the two clamps are configured to contact the second wafer at respective clamp locations; and a plurality of pieces configured to secure the insert within the aperture, the plurality of pieces comprising both fixed and flexible pieces, the plurality of pieces comprising two fixed pieces disposed respectively adjacent to the clamp locations along the second side of the circular frame.

A uniform pressure gang bonding device and fabrication method are presented using an expandable upper chamber with an elastic surface. Typically, the elastic surface is an elastomer material having a Young's modulus in a range of 40 to 1000 kilo-Pascal (kPA). After depositing a plurality of components overlying a substrate top surface, the substrate is positioned over the lower plate, with the top surface underlying and adjacent (in close proximity) to the elastic surface. The method creates a positive upper chamber medium pressure differential in the expandable upper chamber, causing the elastic surface to deform. For example, the positive upper chamber medium pressure differential may be in the range of 0.05 atmospheres (atm) and 10 atm. Typically, the elastic surface deforms between 0.5 millimeters (mm) and 20 mm, in response to the positive upper chamber medium pressure differential.

A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.

A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.

A chip bonding apparatus includes: a bonding contact configured to apply a bonding force to a semiconductor chip disposed on a substrate, the bonding contact having a first surface configured to face the semiconductor chip and a second surface opposite the first surface, the bonding contact including a protruding portion on the first surface, the protruding portion configured to contact the semiconductor chip, the bonding contact including a cavity formed in a region vertically overlapping the protruding portion, a heater disposed to be in contact with the second surface of the bonding contact to cover the cavity, and configured to heat the bonding contact, a bonding head disposed above the heater and configured to transmit the bonding force, and a partition wall structure protruding from a bottom surface of the cavity to partition an inner space of the cavity.

Methods for manufacturing a display device are provided. The methods include providing a plurality of light-emitting units and a substrate. The methods also include transferring the light-emitting units to a transfer head. The methods further include attaching at least one of the plurality of light-emitting units on the transfer head to the substrate by a bonding process, wherein the transfer head and the substrate satisfy the following equation during the bonding process:

[00001]$0\leqq .Math.{\int }_{T1}^{T2}A\left(T\right)\mathrm{dT}-{\int }_{T1}^{T3}E\left(T\right)\mathrm{dT}.Math.<0.01$ wherein A(T) is the coefficient of thermal expansion of the transfer head, E(T) is the coefficient of thermal expansion of the substrate, T1 is room temperature, T2 is the temperature of the transfer head, and T3 is the temperature of the substrate.

Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.

A method for manufacturing an electronic component by a pressure-assisted low-temperature sintering process, by using a pressure sintering device having an upper die and a lower die is disclosed. The upper the die and/or the lower die is provided with a first pressure pad, wherein the method includes the following steps: placing a first sinterable component on a first sintering layer provided on a top layer of a first substrate; joining the sinterable component and the top layer of the first substrate to form a first electronic component by pressing the upper die and the lower die towards each other, wherein the sintering device is simultaneously heated.