Patent classifications
H01L2224/75252
BONDING DEVICE AND BONDING METHOD
A bonding device for bonding an electronic element includes an engaging component. The engaging component has a first surface and a second surface opposite to the first surface. The engaging component includes a plurality of recesses at the second surface. The plurality of recesses are configured to cover a plurality of projections of an electronic element. The engaging component is coupled to a heating component.
Bonding head including a thermal compensator, die bonding apparatus including the same and method of manufacturing semiconductor package using the same
A bonding head for a die bonding apparatus and a die bonding apparatus including the bonding head, the bonding head including a head body; a thermal pressurizer mounted on a lower surface of the head body, the thermal pressurizer being configured to hold and heat at least one die and including a heater having a first heating surface that faces a held surface of the die; and a thermal compensator at an outer region of the die, the thermal compensator extending downwardly from the lower surface of the head body and including at least one thermal compensating block having a second heating surface that emits heat from a heating source therein and that faces a side surface of the die held on the thermal pressurizer.
Thermal compression bonder nozzle with vacuum relief features
An apparatus comprising a bonding nozzle that has one or more channels in a bonding surface. The one or more channels comprise a first channel portion in an inner region of the bonding surface and a second channel portion along an outer periphery of the bonding surface. The one or more channels are in fluid communication with a vacuum port. A vacuum relief conduit within the bonding nozzle comprises a first opening into the second channel portion along the outer periphery of the bonding surface, and a second opening along an exterior wall of the bonding nozzle.
Method of manufacturing a semiconductor package and apparatus for performing the same
In a method of manufacturing a semiconductor package, information with respect to a downward warpage of a reference package substrate, which may be bent with respect to a long axis and/or a short axis of the reference package substrate in applying heat to the reference package substrate to which a plurality of semiconductor chips may be attached using a die attach film (DAF), may be obtained. A package substrate, which may include a first surface to which the semiconductor chips may be attached using the DAF and a second surface opposite to the first surface, may be rotated with respect to the long axis or the short axis at an angle selected based on the information. The heat may be applied to the package substrate to cure the DAF and correct a warpage of the package substrate. Thus, warpage of the package substrate may be corrected for.
LIGHT-EMITTING DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE USING THE SAME
A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. An edge of the upper portion is protruded beyond the neck portion, and an edge of the lower portion is protruded beyond the upper portion.
SYSTEM AND RELATED TECHNIQUES FOR HANDLING ALIGNED SUBSTRATE PAIRS
An industrial-scale system and method for handling precisely aligned and centered semiconductor substrate (e.g., wafer) pairs for substrate-to-substrate (e.g., wafer-to-wafer) aligning and bonding applications is provided. Some embodiments include an aligned substrate transport device having a frame member and a spacer assembly. The centered semiconductor substrate pairs may be positioned within a processing system using the aligned substrate transport device, optionally under robotic control. The centered semiconductor substrate pairs may be bonded together without the presence of the aligned substrate transport device in the bonding device. The bonding device may include a second spacer assembly which operates in concert with that of the aligned substrate transport device to perform a spacer hand-off between the substrates. A pin apparatus may be used to stake the substrates during the hand-off.
Bond heads for thermocompression bonders, thermocompression bonders, and methods of operating the same
A bond head for a thermocompression bonder is provided. The bond head includes a tool configured to hold a workpiece to be bonded, a heater configured to heat the workpiece to be bonded, and a chamber proximate the heater. The chamber is configured to receive a cooling fluid for cooling the heater.
Thermocompression bonders, methods of operating thermocompression bonders, and horizontal scrub motions in thermocompression bonding
A method of operating a thermocompression bonding system is provided. The method includes the steps of: bringing first conductive structures of a semiconductor element into contact with second conductive structures of a substrate in connection with a thermocompression bonding operation; and moving the semiconductor element relative to the substrate along at least one substantially horizontal direction using a motion system of at least one of the semiconductor element and the substrate.
SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME
A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.
Solder bump stretching method and device for performing the same
A wafer-level pulling method includes securing a top holder to a plurality of chips; and securing a bottom holder to a wafer, wherein the plurality of chips are bonded to the wafer by a plurality of solder bumps. The wafer-level pulling method further includes softening the plurality of solder bumps; and stretching the plurality of softened solder bumps.