H01L2224/75272

Thinned die stack

Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.

BUMP BOND STRUCTURE FOR ENHANCED ELECTROMIGRATION PERFORMANCE

A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.

JOINED STRUCTURE, JOINING METHOD, AND JOINING MATERIAL
20200373269 · 2020-11-26 ·

A joined structure includes: a first member; and a second member that faces the first member and that is joined to the first member via a joining layer. The joining layer includes a metal material and a solder material, apart of the metal material has at least one pore, and the solder material is located in a part of an internal area of the at least one pore. Also disclosed is a joining method that makes it possible to produce the joined structure. Further disclosed is a joining material used in the joining method. The joining method makes it possible to achieve non-pressurization sintering processes while maintaining high precise thickness of a joining layer between the first layer and the second layer based on the spacer.

SEMICONDUCTOR APPARATUS WITH HIGH-STABILITY BONDING LAYER AND PRODUCTION METHOD THEREOF

In an embodiment, a semiconductor apparatus comprises: a semiconductor chip, a substrate, and a bonding layer located between the semiconductor chip and the substrate that bonds the semiconductor chip and the substrate, wherein the bonding layer comprises sintered metal that comprises a plurality of voids, and wherein at least a portion of the plurality of voids are filled with a specific material having fluidity at a temperature higher than a preset temperature and is curable after being heated and melted.

Stack tool for reflow and stack apparatus having the same

A stack tool comprises a lower jig having a plurality of package seating regions configured to seat a semiconductor package, an intermediate jig configured to be seated on top of the lower jig, and having a package support hole into which the semiconductor package is configured to be inserted, the intermediate jig having a shape corresponding to the plurality of package seating regions, and an upper dumbbell. The upper dumbbell includes a dumbbell main body on top of the intermediate jig, an upper recess stepped downward from an upper surface of the dumbbell main body on only a region corresponding to an upper surface of the semiconductor package, and a protruding support configured to protrude downward from a lower surface of the upper recess and configured to be brought into contact with an upper surface of the semiconductor package.

SEMICONDUCTOR DEVICE MANUFACTURING METHOD
20200294960 · 2020-09-17 · ·

According to an embodiment, a temperature of an inside of a furnace is set to fall within a range of a reduction temperature or more of a carboxylic acid and less than a melting temperature of a solder bump, and the inside is concurrently set to have a first carboxylic acid gas concentration. Thereafter, the temperature of the inside is raised up to the melting temperature, and the inside is concurrently set to have a second carboxylic acid gas concentration. The second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on an oxide film of the solder bump. The inside has the second carboxylic acid gas concentration at least at a time when the temperature of the inside reaches the melting temperature.

Bump bond structure for enhanced electromigration performance

A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.

Method for manufacturing semiconductor device

There is disclosed a method for manufacturing a semiconductor device comprising a semiconductor chip having a connection portion and a wiring circuit board having a connection portion, the respective connection portions being electrically connected to each other, or a semiconductor device comprising a plurality of semiconductor chips having connection portions, the respective connection portions being electrically connected to each other. The connection portions consist of metal. The above described method comprises: (a) a first step of press-bonding the semiconductor chip and the wiring circuit board or the semiconductor chips to each other so that the respective connection portions are in contact with each other with a semiconductor adhesive interposed therebetween, at a temperature lower than a melting point of the metal of the connection portion, to obtain a temporarily connected body; (b) a second step of sealing at least a part of the temporarily connected body with a sealing resin to obtain a sealed temporarily connected body; and (c) a third step of heating the sealed temporarily connected body at a temperature equal to or higher than the melting point of the metal of the connection portion, to obtain a sealed connected body.

DIE BONDING APPARATUS AND DIE BONDING METHOD

A die bonding apparatus includes: a mounting base including a mounting area on which a first member is mounted; a heater arranged below the mounting base; a side wall configured to surround the mounting area; a collet configured to hold a second member by vacuum-chucking at an end portion; a lid including a hole, the lid being mounted on the side wall; a moving structure configured to move the collet to transport the second member held by the collet through the hole for bonding the second member to the first member; and a gas-supplying tube arranged on the side wall and configured to supply a heating gas to a heating space formed by the side wall and the lid. The lid contains a material capable of: reflecting an infrared radiation caused by the heater and the heating gas; or absorbing and re-radiating the infrared radiation.

THINNED DIE STACK
20200211947 · 2020-07-02 ·

Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.