Patent classifications
H01L2224/75743
SEMICONDUCTOR PACKAGES WITH EMBEDDED BRIDGE INTERCONNECTS
Semiconductor packages with embedded bridge interconnects, and related assemblies and methods, are disclosed herein. In some embodiments, a semiconductor package may have a first side and a second side, and may include a bridge interconnect, embedded in a build-up material, having a first side with a plurality of conductive pads. The semiconductor package may also include a via having a first end that is narrower than a second end. The bridge interconnect and via may be arranged so that the first side of the semiconductor package is closer to the first side of the bridge interconnect than to the second side of the bridge interconnect, and so that the first side of the semiconductor package is closer to the first end of the via than to the second end of the via. Other embodiments may be disclosed and/or claimed.
SEMICONDUCTOR PACKAGES WITH EMBEDDED BRIDGE INTERCONNECTS
Semiconductor packages with embedded bridge interconnects, and related assemblies and methods, are disclosed herein. In some embodiments, a semiconductor package may have a first side and a second side, and may include a bridge interconnect, embedded in a build-up material, having a first side with a plurality of conductive pads. The semiconductor package may also include a via having a first end that is narrower than a second end. The bridge interconnect and via may be arranged so that the first side of the semiconductor package is closer to the first side of the bridge interconnect than to the second side of the bridge interconnect, and so that the first side of the semiconductor package is closer to the first end of the via than to the second end of the via. Other embodiments may be disclosed and/or claimed.
METHODS AND SYSTEMS FOR PARALLEL ASSEMBLY, TRANSFER, AND BONDING OF FERROMAGNETIC COMPONENTS
Methods of and systems for assembling a plurality of ferromagnetic components into a grid-array are provided. One method includes applying a vibratory force to a magnetic stage, the magnetic stage comprising a plurality of magnets and spacers arranged in an array; depositing a plurality of ferromagnetic components, each having a ferromagnetic strip, onto the magnetic stage, the vibratory force distributing the plurality of the ferromagnetic components substantially evenly across a surface of the magnetic stage, and wherein the vibratory force aligns at least one of the plurality of ferromagnetic components with a node of maximum magnetic field strength of the magnetic stage; and removing a set of the plurality of ferromagnetic components that are not in a node of maximum magnetic field strength through physical inversion of the magnetic stage.
Bonding of bridge to multiple semiconductor chips
Interconnecting a first chip and a second chip includes mounting the first and second chips to a chip handler having an opening and at least one support surface. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The first surface of the first chip and the first surface of the second chip mounted to the chip handler are supported by the at least one support surface of the chip handler. The first and second chips are placed on a chip support member with the chip handler from the second surfaces. A bridge member is inserted by a bridge handler through the opening of the chip handler to place the bridge member onto the first sets of terminals of the first and second chips that are exposed from the opening.
BONDING SYSTEM
A bonding system includes a substrate transfer device configured to transfer a first substrate and a second substrate to a bonding apparatus, a first holding plate configured to hold the first substrate from an upper surface side, and a second holding plate disposed below the first holding plate and configured to hold the second substrate from a lower surface side so that the second substrate faces the first substrate. The substrate transfer device includes a first holding part capable of holding the first substrate from the upper surface side, and a second holding part disposed below the first holding part and capable of holding the second substrate from the lower surface side. The first holding part and the second holding part are configured to receive and hold the first substrate and the second substrate at the same time from the first holding plate and the second holding plate.
Bonding System
A bonding system includes a substrate transfer device configured to transfer a first substrate and a second substrate in a normal pressure atmosphere, a surface modifying apparatus configured to modify surfaces of the first substrate and the second substrate to be bonded with each other in a depressurized atmosphere, a load lock chamber in which the first substrate and the second substrate are delivered between the substrate transfer device and the surface modifying apparatus and in which an internal atmosphere of the load lock chamber is switchable between an atmospheric pressure atmosphere and the depressurized atmosphere, a surface hydrophilizing apparatus configured to hydrophilize the modified surfaces of the first substrate and the second substrate, and a bonding apparatus configured to bond the hydrophilized surfaces of the first substrate and the second substrate by an intermolecular force.
BONDING METHOD OF SEMICONDUCTOR CHIP AND BONDING APPARATUS OF SEMICONDUCTOR CHIP
A mounting apparatus of a chip including a mechanism configured to arrange a front surface of a chip and a front surface of a substrate to face each other such that a back surface of the chip is attached to a sheet, the sheet having a first portion corresponding to the selected chip and a the second portion arranged at a periphery of the first portion corresponding to the selected chip in the sheet when seen in a direction perpendicular to the front surface of the substrate; a holding mechanism moving in a direction that is not perpendicular to the front surface of the substrate and arranged to hold the second portion of the sheet; and a pushing mechanism for pushing the back surface of the chip through the first portion of the sheet so that the front surface of the chip is brought close to the front surface of the substrate with the first portion deformed in a state where the second portion is held by the holding mechanism, and configured to release the pushing mechanism from the first portion of the sheet to strip the sheet from the back surface of the chip.
Apparatus, system, and method for handling aligned wafer pairs
An industrial-scale apparatus, system, and method for handling precisely aligned and centered semiconductor wafer pairs for wafer-to-wafer aligning and bonding applications includes an end effector having a frame member and a floating carrier connected to the frame member with a gap formed therebetween, wherein the floating carrier has a semi-circular interior perimeter. The centered semiconductor wafer pairs are positionable within a processing system using the end effector under robotic control. The centered semiconductor wafer pairs are bonded together without the presence of the end effector in the bonding device.
Apparatus, system, and method for handling aligned wafer pairs
An industrial-scale apparatus, system, and method for handling precisely aligned and centered semiconductor wafer pairs for wafer-to-wafer aligning and bonding applications includes an end effector having a frame member and a floating carrier connected to the frame member with a gap formed therebetween, wherein the floating carrier has a semi-circular interior perimeter. The centered semiconductor wafer pairs are positionable within a processing system using the end effector under robotic control. The centered semiconductor wafer pairs are bonded together without the presence of the end effector in the bonding device.
Semiconductor device and method of manufacturing the same
A semiconductor device includes a wiring substrate, a first semiconductor chip flip-chip connected to the wiring substrate, a first underfill resin filled between the wiring substrate and the first semiconductor chip, the first underfill resin including a pedestal portion arranged in a periphery of the first semiconductor chip, a second semiconductor chip flip-chip connected to the first semiconductor chip, and being larger in area than the first semiconductor chip, and a second underfill resin filled between the first semiconductor chip and the second semiconductor chip, the second underfill resin covering an upper face of the pedestal portion of the first underfill resin and a side face of the second semiconductor chip.