Patent classifications
H01L2224/80004
Chip package structure with redistribution layer having bonding portion
A chip package structure is provided. The chip package structure includes a first redistribution layer having a bonding portion. The bonding portion includes a dielectric layer. The chip package structure includes a chip structure bonded to the bonding portion. A first width of the dielectric layer of the bonding portion is substantially equal to a second width of the chip structure. The chip package structure includes a protective layer over the first redistribution layer and surrounding the chip structure. A portion of the protective layer extends into the first redistribution layer and surrounds the bonding portion.
Method for bonding chips to a substrate by direct bonding
A process for bonding chips to a substrate by direct bonding includes providing a support with which the chips are in contact, the chips in contact with the support being separate from one another. This bonding process also includes forming a liquid film on one face of the substrate, bringing the chips into contact with the liquid film, where the action of bringing the chips into contact with the liquid film causes attraction of the chips toward the substrate, and evaporating the liquid film in order to bond the chips to the substrate by direct bonding.
Method for bonding of chips
A method for bonding chips onto a substrate or onto further chips. The chips are bonded onto the substrate or the further chips by means of a direct bond.
CHIP PACKAGE STRUCTURE WITH REDISTRIBUTION LAYER HAVING BONDING PORTION
A chip package structure is provided. The chip package structure includes a first redistribution layer having a first bonding portion and a chip structure bonded to the first bonding portion. A first width of the first bonding portion is substantially equal to a second width of the chip structure, and the chip structure includes a semiconductor substrate. The chip package structure also includes a second redistribution layer connected between the semiconductor substrate and the first bonding portion. The second redistribution layer has a second bonding portion and a first portion between the second bonding portion and the semiconductor substrate. The second bonding portion is connected to the first bonding portion. The first portion has a first sidewall and a second sidewall opposite to the first sidewall, and the second bonding portion is between the first sidewall and the second sidewall.
Electronic circuit manufacturing method for self-assembly to another electronic circuit
The present description relates to a method of manufacturing an electronic circuit (30) comprising: a support (32), an assembly site (31) having a first surface protruding from said support intended to be assembled to an assembly site of another electronic circuit by a self-assembly method; and a peripheral area (39) around said assembly site, the assembly site (31) comprising at least one level, each level comprising conductive pads (34) and insulating posts (380) between the conductive pads, said manufacturing method comprising the forming of said at least one level of the assembly site, such that the edges, in at least one direction (X) of the main plane (XY), of each level of the assembly site and the locations, in the at least one direction (X), of the conductive pads and of the insulating posts of the same level are defined in a same photolithography step of said method.
BONDING METHOD AND BONDING APPARATUS
A bonding method includes: preparing first and second substrates, a surface of each of the first and second substrates having a first region from which an insulating film is exposed and a second region from which a conductive film is exposed, and at least one of the first or second substrate; performing a surface activation treatment on the insulating film exposed from the first region of each of the substrates; after the surface activation treatment, performing a hydrophilization treatment on a surface of the insulating film exposed from the first region by supplying a hydrophilization treatment liquid to the surfaces of the substrates; after the surface activation treatment, and before the hydrophilization treatment or parallel to the hydrophilization treatment, supplying an ionic surfactant to the surface of the at least one of the first or second substrate; and bonding the surfaces of the substrates after the hydrophilization treatment.
Method of bonding a semiconductor die to a wafer
The inventive concept provides a bonding method. The bonding method includes bonding a second bonding object to a first bonding object, which is a bonding step; providing a protective agent to a region of the first bonding object which is not bonded to the second bonding object, which is a protective agent providing step; and etching a backside of the second bonding object, which is an etching step.
PROCEDURE TO ENABLE DIE REWORK FOR HYBRID BONDING
Methods of bonding one or more dies to a substrate are provided herein. In some embodiments, a method of bonding one or more dies to a substrate includes: applying a material coating on the one or more dies or the substrate; placing the one or more dies on the substrate so that the one or more dies temporarily adhere to the substrate via surface tension or tackiness of the material coating; inspecting each of the one or more dies that are placed on the substrate for defects; and removing any of the one or more dies that are found to have defects.