A semiconductor die includes first pads, switches that are electrically connected with the first pads, respectively, a test signal generator that generates test signals and to transmit the test signals to the switches, internal circuits that receive first signals through the first pads and the switches, to perform operations based on the first signals, and to output second signals through the switches and the first pads based on a result of the operations, and a switch controller that controls the switches so that the first pads communicate with the test signal generator during a test operation and that the first pads communicate with the internal circuits after a completion of the test operation.

Semiconductor packages are disclosed. A semiconductor package includes an integrated circuit, a first die and a second die. The first die includes a first bonding structure and a first seal ring. The first bonding structure is bonded to the integrated circuit and disposed at a first side of the first die. The second die includes a second bonding structure. The second bonding structure is bonded to the integrated circuit and disposed at a first side of the second die. The first side of the first die faces the first side of the second die. A first portion of the first seal ring is disposed between the first side and the first bonding structure, and a width of the first portion is smaller than a width of a second portion of the first seal ring.

Discussed is a device for self-assembling semiconductor light-emitting diodes includes a substrate chuck that is provided in an assembly chamber and supports a substrate and disposes the substrate at an assembly position, wherein the substrate chuck sucks or injects a gas present between the substrate and a fluid during loading and unloading of the substrate.

Discussed is a device for self-assembling semiconductor light-emitting diodes includes a substrate chuck that is provided in an assembly chamber and supports a substrate and disposes the substrate at an assembly position, wherein the substrate chuck sucks or injects a gas present between the substrate and a fluid during loading and unloading of the substrate.

A method for manufacturing an electronic circuit component includes: providing a first electronic component with one or several electrically conductive first contacts and with one or several insulating first supporting elements; providing a second electronic component with one or several electrically conductive second contacts and with one or several insulating second supporting elements; configuring a connecting structure with an interposer substrate, with electrically conductive third contacts, with one or several electrically conductive fourth contacts, with one or several insulating third supporting elements, with one or several electrically conductive fifth contacts, and with one or several insulating fourth supporting elements; connecting the first electronic component and the second electronic component to the connecting structure, wherein the first contacts are electrically connected to the fourth contacts, wherein the first supporting elements are mechanically connected to the third supporting elements, wherein the second contacts are electrically connected to the fifth contacts, and wherein the second supporting elements are mechanically connected to the fourth supporting elements, so that the first electronic component, the second electronic component, and the connecting structure are connected electrically and mechanically; removing a part of the interposer substrate so that the third contacts are exposed.

A first workpiece includes first active pads, a first test pad, and a second test pad on a primary surface of the first workpiece, the first test pad electrically connected to the second test pad. A second workpiece includes second active pads, a third test pad, and a fourth test pad on a primary surface of the second workpiece. The first and second workpieces are bonded along an interface between the primary surface of the first workpiece and the primary surface of the second workpiece to bond the first active pads with the second active pads, bond the first test pad with the third test pad, and bond the second test pad with the fourth test pad. Connectivity detection circuits test electrical connectivity between the third test pad and the fourth test pad

A method of manufacturing a semiconductor memory device includes processing a first substrate including a first align mark and a first structure, processing a second substrate including a second align mark and a second structure, orientating the first substrate and the second substrate such that the first structure and the second structure face each other, and controlling alignment between the first structure and the second structure by using the first align mark and the second align mark to couple the first structure with the second structure.

To improve the joining strength between semiconductor chips. In a semiconductor device, a first semiconductor chip includes a first joining surface including a first insulating layer, a plurality of first pads to which a first inner layer circuit insulated by the first insulating layer is electrically connected, and a linear first metal layer arranged on an outside of the plurality of first pads. A second semiconductor chip includes a second joining surface joined to the first joining surface, the second joining surface including a second insulating layer, a plurality of second pads that are arranged in positions facing the first pads and to which a second inner layer circuit insulated by the second insulating layer is electrically connected, and a linear second metal layer arranged in a position facing the first metal layer. A width of the first metal layer and the second metal layer is a width based on a joining strength between the first insulating layer and the second insulating layer and a joining strength between the first metal layer and the second metal layer in an area from an end portion of the first semiconductor chip to the first pad.

Semiconductor devices are provided in which a first semiconductor device is bonded to a second semiconductor device. The bonding may occur at a gate level, a gate contact level, a first metallization layer, a middle metallization layer, or a top metallization layer of either the first semiconductor device or the second semiconductor device.

Semiconductor devices are provided in which a first semiconductor device is bonded to a second semiconductor device. The bonding may occur at a gate level, a gate contact level, a first metallization layer, a middle metallization layer, or a top metallization layer of either the first semiconductor device or the second semiconductor device.