A semiconductor die is provided, comprising a semiconductor substrate, a dielectric layer over the semiconductor substrate, a bond pad in the dielectric layer, the bond pad including an exposed top surface that is recessed with respect to a surface of the dielectric layer opposite to the semiconductor substrate, and a region including a plurality of embedded nanoparticles in the dielectric layer, wherein the region is located proximate to the bond pad to supply thermal energy to the bond pad in response to exposing the plurality of embedded nanoparticles to an externally-applied field.

Bonding system for bonding a second article to a first article, comprising an activation treatment device that comprises an object supporter that supports objects comprising the second article, and a particle beam source that activates a bonding surface of the second article by irradiating the objects with a particle beam, the objects being set on one treatment surface without being opposed to each other, followed by performing activation treatment by the particle beam source; and a bond device that brings the second article, of which the bonding surface is activated by the activation treatment device, into contact with the first article, to thereby bond the second article to the first article, wherein the object supporter supports the objects in a posture in which a portion formed of a plurality of kinds of materials comprising the bonding surface of the second article in the objects is exposed to the particle beam source.

A semiconductor package includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip includes a peripheral region having a groove and a bonding region that is disposed higher than the groove. The second semiconductor chip is disposed in the bonding region of the first semiconductor chip. The second semiconductor chip is directly electrically connected to the first semiconductor chip. The second semiconductor chip includes an overhang protruded from the bonding region. The overhang is spaced apart from a bottom surface of the groove. Thus, a bonding failure, which may be caused by particles generated during a cutting the wafer and adhered to the edge portion of the second semiconductor chip, between the first semiconductor chip and the second semiconductor chip might be avoided.