An image sensor includes a sensor chip and a logic chip. The sensor chip includes a first substrate, an upper bonding layer, a first wiring layer, and the logic chip includes a second substrate, a lower bonding layer, a second wiring layer. The upper and lower bonding layers contact each other, with the upper bonding layer including an upper dielectric layer, an upper conductive pad, an upper shield structure, and an upper wiring line, and the lower bonding layer including a lower dielectric layer, a lower conductive pad, a lower shield structure, and a lower wiring line. The upper wiring line, upper conductive pad, and upper shield structure being one body, and the lower wiring line, lower conductive pad, and lower shield structure being one body, the upper and lower conductive pads overlap and contact each other, and the upper and lower wiring lines overlap and contact each other.

A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.

A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.

Microelectronic assemblies, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component, having a first surface and an opposing second surface including a first direct bonding region at the second surface with first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component, having a first surface and an opposing second surface, including a second direct bonding region at the first surface with second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the second microelectronic component is coupled to the first microelectronic component by the first and second direct bonding regions; and a shield structure in the first direct bonding dielectric material at least partially surrounding the one or more of the first metal contacts.

Microelectronic assemblies, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component, having a first surface and an opposing second surface including a first direct bonding region at the second surface with first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component, having a first surface and an opposing second surface, including a second direct bonding region at the first surface with second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the second microelectronic component is coupled to the first microelectronic component by the first and second direct bonding regions; and a shield structure in the first direct bonding dielectric material at least partially surrounding the one or more of the first metal contacts.

Microelectronic assemblies fabricated using hybrid manufacturing for integrating photonic and electronic components, as well as related devices and methods, are disclosed herein. As used herein, “hybrid manufacturing” refers to fabricating a microelectronic assembly by bonding at least two IC structures fabricated using different manufacturers, materials, or manufacturing techniques. Before bonding, at least one IC structure may include photonic components such as optical waveguides, electro-optic modulators, and monolithically integrated lenses, and at least one may include electronic components such as electrically conductive interconnects, transistors, and resistors. One or more additional electronic and/or photonic components may be provided in one or more of these IC structures after bonding. For example, an interconnect implemented as an electrically conductive via or a waveguide implemented as a dielectric via may be provided after bonding to extend through one or more of the bonded IC structures.

Microelectronic assemblies fabricated using hybrid manufacturing for integrating photonic and electronic components, as well as related devices and methods, are disclosed herein. As used herein, “hybrid manufacturing” refers to fabricating a microelectronic assembly by bonding at least two IC structures fabricated using different manufacturers, materials, or manufacturing techniques. Before bonding, at least one IC structure may include photonic components such as optical waveguides, electro-optic modulators, and monolithically integrated lenses, and at least one may include electronic components such as electrically conductive interconnects, transistors, and resistors. One or more additional electronic and/or photonic components may be provided in one or more of these IC structures after bonding. For example, an interconnect implemented as an electrically conductive via or a waveguide implemented as a dielectric via may be provided after bonding to extend through one or more of the bonded IC structures.

Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, and related structures and techniques. In some embodiments, a microelectronic assembly may include an interposer; a first microelectronic component having a first surface coupled to the interposer by a first direct bonding region and an opposing second surface; a second microelectronic component having a first surface coupled to the interposer by a second direct bonding region and an opposing second surface; a liner material on the surface of the interposer and around the first and second microelectronic components; an inorganic fill material on the liner material and between the first and second microelectronic components; and a third microelectronic component coupled to the second surfaces of the first and second microelectronic components. In some embodiments, the liner material, the inorganic fill material, and a material of the third microelectronic component may include a thermally conductive material.

Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, and related structures and techniques. In some embodiments, a microelectronic assembly may include an interposer; a first microelectronic component having a first surface coupled to the interposer by a first direct bonding region and an opposing second surface; a second microelectronic component having a first surface coupled to the interposer by a second direct bonding region and an opposing second surface; a liner material on the surface of the interposer and around the first and second microelectronic components; an inorganic fill material on the liner material and between the first and second microelectronic components; and a third microelectronic component coupled to the second surfaces of the first and second microelectronic components. In some embodiments, the liner material, the inorganic fill material, and a material of the third microelectronic component may include a thermally conductive material.

A stacking structure including a first die, a second die stacked on the first die, and a filling material is provided. The first die has a first bonding structure, and the first bonding structure includes first bonding pads and a first heat dissipating element. The second die has a second bonding structure, and the second bonding structure includes second bonding pads and a second heat dissipating element. The first bonding pads are bonded with the second bonding pads. The first heat dissipating element is connected to one first bonding pad of the first bonding pads and the second heat dissipating element is connected to one second bonding pad of the second bonding pads. The filling material is disposed over the first die and laterally around the second die. The first and second dies are bonded through the first and second bonding structures.