Patent classifications
H01L2224/80385
VARIABLE PITCH MULTI-NEEDLE HEAD FOR TRANSFER OF SEMICONDUCTOR DEVICES
A direct transfer apparatus includes a dot matrix transfer head, which includes an impact wire housing and a plurality of impact wires disposed within the impact wire housing and extending out of the impact wire housing. A guide head is attached to the impact wire housing. The guide head includes multiple holes configured to arrange the plurality of impact wires in a matrix configuration, the matrix configuration being a matched-pitch configuration.
Method for direct bonding with self-alignment using ultrasound
A method for direct bonding an electronic chip onto a substrate or another electronic chip, the method including: carrying out a hydrophilic treatment of a portion of, a surface of the electronic chip and of a portion of a surface of the substrate or of the other electronic chip; depositing an aqueous fluid on the portion of the surface of the substrate or of the second electronic chip; depositing the portion of the surface of the electronic chip on the aqueous fluid; drying the aqueous fluid until the portion of the surface of the electronic chip is rigidly connected to the portion of the surface of the substrate or of the other electronic chip: and during at least part of the drying of the aqueous fluid, emitting ultrasound into the aqueous fluid through the substrate or the other electronic chip.
SELECTIVE RECESS
Representative implementations of techniques and devices are used to remedy or mitigate the effects of damaged interconnect pads of bonded substrates. A recess of predetermined size and shape is formed in the surface of a second substrate of the bonded substrates, at a location that is aligned with the damaged interconnect pad on the first substrate. The recess encloses the damage or surface variance of the pad, when the first and second substrates are bonded.
DIFFUSION BARRIER COLLAR FOR INTERCONNECTS
Representative implementations of techniques and devices are used to reduce or prevent conductive material diffusion into insulating or dielectric material of bonded substrates. Misaligned conductive structures can come into direct contact with a dielectric portion of the substrates due to overlap, especially while employing direct bonding techniques. A barrier interface that can inhibit the diffusion is disposed generally between the conductive material and the dielectric at the overlap.
ELECTRONIC MODULE AND METHOD FOR PRODUCING SAME
An electronic module on a flexible planar circuit substrate with a conductor configuration on a first substrate surface and a plurality of electronic components on the opposite, second substrate surface, wherein the components have component contacts, which are electrically connected selectively by way of vias in the circuit substrate and the conductor configuration, wherein the circuit substrate is a thermoplastic polymer and the component contacts are melted or thermally pressed into the second substrate surface in the region of the vias.
MICRO DEVICE INTEGRATION INTO SYSTEM SUBSTRATE
Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices.
MICRO DEVICE INTEGRATION INTO SYSTEM SUBSTRATE
Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices.
Micro device integration into system substrate
Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices.
METHOD FOR DIRECT BONDING WITH SELF-ALIGNMENT USING ULTRASOUND
A method for direct bonding an electronic chip onto a substrate or another electronic chip, the method including: carrying out a hydrophilic treatment of a portion of, a surface of the electronic chip and of a portion of a surface of the substrate or of the other electronic chip; depositing an aqueous fluid on the portion of the surface of the substrate or of the second electronic chip; depositing the portion of the surface of the electronic chip on the aqueous fluid; drying the aqueous fluid until the portion of the surface of the electronic chip is rigidly connected to the portion of the surface of the substrate or of the other electronic chip: and during at least part of the drying of the aqueous fluid, emitting ultrasound into the aqueous fluid through the substrate or the other electronic chip.
BONDING STRUCTURES IN SEMICONDUCTOR PACKAGES
Various embodiments of an integrated circuit (IC) die package are disclosed. An IC die package includes an IC die, an interposer structure electrically connected to the IC die, a first bonding structure, and a second bonding structure. The first bonding structure includes a first dielectric layer disposed on the IC die and also includes a first conductive pad having an embedded portion disposed in the first dielectric layer and an anchor portion extending over a top surface of the first dielectric layer. The second bonding structure includes a second dielectric layer disposed on the interposer structure, a second conductive pad disposed in the second dielectric layer, and an anchor layer surrounding the anchor portion.