H01L2224/80894

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
20230246015 · 2023-08-03 · ·

In one embodiment, a semiconductor device includes a first interconnection including a first extending portion extending in a first direction, and a first curved portion curved with respect to the first extending portion. The device further includes a second interconnection including a second extending portion extending in the first direction and adjacent to the first extending portion in a second direction, and a second curved portion curved with respect to the second extending portion. The device further includes a first plug provided on the first curved portion, or on a first non-opposite portion included in the first extending portion and not opposite to the second extending portion in the second direction. The device further includes a second plug provided on the second curved portion, or on a second non-opposite portion included in the second extending portion and not opposite to the first extending portion in the second direction.

Semiconductor device with composite connection structure and method for fabricating the same
11315893 · 2022-04-26 · ·

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a first insulating layer positioned above the substrate, a second insulating layer positioned above the first insulating layer, a plurality of first conductive features positioned in the first insulating layer and the second insulating layer, and an alleviation structure positioned between the first insulating layer and the second insulating layer. The alleviation structure includes a first connecting interlayer respectively electrically coupled to the plurality of first conductive features positioned in the first insulating layer and the second insulating layer, and a plurality of alleviation structures positioned between the plurality of first conductive features in the first insulating layer and the plurality of first conductive features in the second insulating layer, wherein a porosity of the plurality of alleviation structures is between about 25% and about 100%.

Semiconductor device with composite connection structure and method for fabricating the same
11315893 · 2022-04-26 · ·

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a first insulating layer positioned above the substrate, a second insulating layer positioned above the first insulating layer, a plurality of first conductive features positioned in the first insulating layer and the second insulating layer, and an alleviation structure positioned between the first insulating layer and the second insulating layer. The alleviation structure includes a first connecting interlayer respectively electrically coupled to the plurality of first conductive features positioned in the first insulating layer and the second insulating layer, and a plurality of alleviation structures positioned between the plurality of first conductive features in the first insulating layer and the plurality of first conductive features in the second insulating layer, wherein a porosity of the plurality of alleviation structures is between about 25% and about 100%.

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
20230307423 · 2023-09-28 · ·

A device includes a lower semiconductor substrate, a lower gate structure on the lower semiconductor substrate, the lower gate structure comprises a lower gate electrode, a lower interlayer insulating film on the lower semiconductor substrate, an upper semiconductor substrate on the lower interlayer insulating film, an upper gate structure on the upper semiconductor substrate, and an upper interlayer insulating film on the lower interlayer insulating film, the upper interlayer insulating film covers sidewalls of the upper semiconductor substrate The upper gate structure comprises an upper gate electrode extending in a first direction and gate spacers along sidewalls of the upper gate electrode. The upper gate electrode comprises long sidewalls extending in the first direction and short sidewalls in a second direction The gate spacers are on the long sidewalls of the upper gate electrode and are not disposed on the short sidewalls of the upper gate electrode.

Semiconductor device and method of manufacturing the same

In one embodiment, a semiconductor device includes a first insulator. The device further includes a first pad provided in the first insulator, and including first and second layers provided on lateral and lower faces of the first insulator in order. The device further includes a second insulator provided on the first insulator. The device further includes a second pad provided on the first pad in the second insulator, and including third and fourth layers provided on lateral and upper faces of the second insulator in order. The device further includes a first portion provided between an upper face of the first pad and a lower face of the second insulator or between a lower face of the second pad and an upper face of the first insulator, and including a metal element same as a metal element included in the first layer or the third layer.

Method and device for bonding of chips
11764198 · 2023-09-19 · ·

A method and device for bonding chips onto a substrate or onto further chips. The chips are bonded onto the substrate or the further chips by means of a direct bond.

RF circuit module and manufacturing method therefor
11764197 · 2023-09-19 · ·

An RF circuit module includes a module substrate, a first substrate in which a first circuit is implemented, and a second substrate in which a second circuit is implemented. The first circuit includes a control circuit that controls an operation of the second circuit. The second circuit includes a radio-frequency amplifier circuit that amplifies an RF signal. The second substrate is mounted on the first substrate. The first substrate is disposed on the module substrate such that a circuit forming surface faces the module substrate. The first substrate and the second substrate have a circuit-to-circuit connection wire that electrically connects the first circuit and the second circuit without intervening the module substrate.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD

A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD

A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.

IMAGE SENSOR DEVICE
20210366970 · 2021-11-25 ·

Methods of forming a back side image sensor device, as well as back side image sensor devices formed, are disclosed. In one such a method, an image sensor wafer having a first dielectric layer with a first surface is obtained. A reconstituted wafer having a processor die and a second dielectric layer with a second surface is obtained. The reconstituted wafer and the image sensor wafer are bonded to one another including coupling the first surface of the first dielectric layer and the second surface of the second dielectric layer. In another method, such formation is for a processor die bonded to an image sensor wafer. In yet another method, such formation is for a processor die bonded to an image sensor die.