Representative implementations of devices and techniques provide interconnect structures and components for coupling various carriers, printed circuit board (PCB) components, integrated circuit (IC) dice, and the like, using tall and/or fine pitch physical connections. Multiple layers of conductive structures or materials are arranged to form the interconnect structures and components. Nonwettable barriers may be used with one or more of the layers to form a shape, including a pitch of one or more of the layers.

A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. An edge of the upper portion is protruded beyond the neck portion, and an edge of the lower portion is protruded beyond the upper portion.

A connection structure including: a first circuit member having a plurality of first electrodes; a second circuit member having a plurality of second electrodes; and an intermediate layer having a plurality of bonding portions electrically connecting the first electrodes and the second electrodes, in which at least one of the first electrode and the second electrode that are connected by the bonding portion is a gold electrode, and 90% or more of the plurality of bonding portions include a first region containing a tin-gold alloy and connecting the first electrode and the second electrode and a second region containing bismuth and being in contact with the first region.

A connection structure including: a first circuit member having a plurality of first electrodes; a second circuit member having a plurality of second electrodes; and an intermediate layer having a plurality of bonding portions electrically connecting the first electrodes and the second electrodes, in which at least one of the first electrode and the second electrode that are connected by the bonding portion is a gold electrode, and 90% or more of the plurality of bonding portions include a first region containing a tin-gold alloy and connecting the first electrode and the second electrode and a second region containing bismuth and being in contact with the first region.

A bump-forming film is used for forming, on a semiconductor device such as a bumpless IC chip, bumps which are low in cost and can achieve stable conduction reliability. The bump-forming film is configured such that conductive fillers for bumps are arranged regularly in a planar view in an insulating adhesive resin layer. The regular arrangement has a periodic repeating unit in the longitudinal direction of the film. The straight line which connects one ends of the conductive fillers for bumps in the thickness direction of the film is substantially parallel to the surface of the film.

An integrated device package that includes a die, a substrate, a fill and a conductive interconnect. The die includes a pillar, where the pillar has a first pillar width. The substrate (e.g., package substrate, interposer) includes a dielectric layer and a substrate interconnect (e.g., surface interconnect, embedded interconnect). The fill is located between the die and the substrate. The conductive interconnect is located within the fill. The conductive interconnect includes a first interconnect width that is about the same or less than the first pillar width. The conductive interconnect is coupled to the pillar and the substrate interconnect. The fill is a non-conductive photosensitive material. The fill is a photosensitive film. The substrate interconnect includes a second interconnect width that is equal or greater than the first pillar width. The conductive interconnect includes one of at least a paste, a solder and/or an enhanced solder comprising a polymeric material.

A package includes first package component and a second package component. The first package component includes a first electrical connector at a surface of the first package component, and a first solder region on a surface of the first electrical connector. The second package component includes a second electrical connector at a surface of the second package component, and a second solder region on a surface of the second electrical connector. A metal pin has a first end bonded to the first solder region, and a second end bonded to the second solder region.

A system of producing metal cored solder structures on a substrate includes: a decal, a carrier, and receiving elements. The decal includes one or more apertures each of which is tapered from a top surface to a bottom surface thereof. The carrier is positioned beneath the bottom of the decal and includes cavities in a top surface. The cavities are located in alignment with the apertures of the decal. The decal is positioned on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities. The feature cavities are shaped to receive one or more metal elements and are configured for receiving molten solder cooled in the cavities. The decal is separable from the carrier to partially expose metal core solder contacts. The receiving elements receive the metal core solder contacts thereon.

A system of producing metal cored solder structures on a substrate includes: a decal having a plurality of apertures, the apertures being tapered from a top surface to a bottom surface of the decal; a carrier configured for positioning beneath the bottom of the decal, the carrier having cavities in a top surface and the cavities located in alignment with the apertures of the decal; the decal being configured for positioning on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities, the feature cavities being shaped to receive a plurality of metal elements therein, the feature cavities configured for receiving molten solder being cooled in the cavities, the decal being separable from the carrier to partially expose metal core solder contacts; and receiving elements of a substrate being configured to receive the metal core solder contacts thereon, and the metal core solder contacts being exposed and positioned on the substrate.

An adhesive with self-connecting interconnects is provided. The adhesive layer provides automatic 3D joining of microelectronic components with a conductively self-adjusting anisotropic matrix. In an implementation, the adhesive matrix automatically makes electrical connections between two surfaces that have opposing electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.