Patent classifications
H01L2224/81143
BUMP-ON-TRACE INTERCONNECT
Disclosed herein is a bump-on-trace interconnect with a wetted trace sidewall and a method for fabricating the same. A first substrate having conductive bump with solder applied is mounted to a second substrate with a trace disposed thereon by reflowing the solder on the bump so that the solder wets at least one sidewall of the trace, with the solder optionally wetting between at least half and all of the height of the trace sidewall. A plurality of traces and bumps may also be disposed on the first substrate and second substrate with a bump pitch of less than about 100 m, and volume of solder for application to the bump calculated based on at least one of a joint gap distance, desired solder joint width, predetermined solder joint separation, bump geometry, trace geometry, minimum trace sidewall wetting region height and trace separation distance.
SEMICONDUCTOR DEVICE
A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 m or less.
Substrate structure with selective surface finishes for flip chip assembly
The present disclosure relates to a substrate structure with selective surface finishes used in flip chip assembly, and a process for making the same. The disclosed substrate structure includes a substrate body, a metal structure with a first finish area and a second finish area, a first surface finish, and a second surface finish. The metal structure is formed on a top surface of the substrate body, the first surface finish is formed over the first finish area of the metal structure, and the second surface finish is formed over the second finish area of the metal structure. The first surface finish is different from the second surface finish.
Bonded Structures for Package and Substrate
The embodiments described provide elongated bonded structures near edges of packaged structures free of solder wetting on sides of copper posts substantially facing the center of the packaged structures. Solder wetting occurs on other sides of copper posts of these bonded structures. The elongated bonded structures are arranged in different arrangements and reduce the chance of shorting between neighboring bonded structures. In addition, the elongated bonded structures improve the reliability performance.
Solder-Pinning Metal Pads for Electronic Components
Solder-pinning metal pads for electronic components and techniques for use thereof to mitigate de-wetting are provided. In one aspect, a structure includes: a substrate; and a solder pad on the substrate, wherein the solder pad has sidewalls extending up from a surface thereof. For instance, the sidewalls can be present at edges of the solder pad, or inset from the edges of the solder pad. The sidewalls can be vertical or extend up from the solder pad at an angle. The sidewalls can be formed from the same material or a different material as the solder pad. A method is also provided that includes forming a solder pad on a substrate, the solder pad comprising sidewalls extending up from a surface thereof.
Conductive pillar shaped for solder confinement
A pillar-type connection includes a first conductive layer that includes a hollow core. A second conductive layer is connected to the first conductive layer defining a conductive pillar that includes a top surface defining a recess aligned with the hollow core. A conductive via terminates at a top surface of the first conductive layer.
CONDUCTIVE PILLAR SHAPED FOR SOLDER CONFINEMENT
A pillar-type connection includes a first conductive layer that includes a hollow core. A second conductive layer is connected to the first conductive layer defining a conductive pillar that includes a top surface defining a recess aligned with the hollow core.
Die Features for Self-Alignment During Die Bonding
A semiconductor device assembly that includes a substrate having a first side and a second side, the first side having at least one dummy pad and at least one electrical pad. The semiconductor device assembly includes a first semiconductor device having a first side and a second side and at least one electrical pillar extending from the second side. The electrical pillar is connected to the electrical pad via solder to form an electrical interconnect. The semiconductor device assembly includes at least one dummy pillar extending from the second side of the first semiconductor device and a liquid positioned between an end of the dummy pillar and the dummy pad. The surface tension of the liquid pulls the dummy pillar towards the dummy pad. The surface tension may reduce or minimize a warpage of the semiconductor device assembly and/or align the dummy pillar and the dummy pad.
LIGHT-EMITTING DIODE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
A light-emitting diode package structure includes a carrier, at least one self-assembled material layer, a first solder mask layer, and at least one light-emitting diode. The carrier includes a first build-up circuit. The self-assembled material layer is disposed on the first build-up circuit. The first solder mask layer is disposed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the self-assembled material layer. The light-emitting diode is disposed on the first build-up circuit. The light-emitting diode has a self-assembled pattern. The light-emitting diode is self-assembled into the opening of the first solder mask layer through a force between the self-assembled pattern and the self-assembled material layer. A manufacturing method of the light-emitting diode package structure is also provided.
DIE TRANSFER METHOD AND DIE TRANSFER SYSTEM THEREOF
A die transfer method and a die transfer system thereof are disclosed. The die transfer method includes the following steps: providing a wafer to generate a plurality of dies; transferring a plurality of dies to a surface of a donor substrate to fix the plurality of dies on the surface of the donor substrate by a photoreactive adhesive layer; aligning the donor substrate with a target substrate, wherein the target substrate has a landing site and the position of at least one die corresponds to the position of the landing site; irradiating the donor substrate with a radiation beam to cause the photoreactive adhesive layer to drop the at least one die, such that the at least one die is transferred onto the landing site of the target substrate; and fixing the at least one die at the landing site.