Embodiments include a package substrate and semiconductor packages. A package substrate includes a first cavity in a top surface, first conductive pads on a first surface of the first cavity, a second cavity in a bottom surface, second conductive pads on a second surface of the second cavity, where the first surface is above the second surface, and a third cavity in the first and second cavities, where the third cavity vertically extends from the top surface to the bottom surface. The third cavity overlaps a first portion of the first cavity and a second portion of the second cavity. The package substrate may include conductive lines coupled to the first and second conductive pads, a first die in the first cavity, a second die in the second cavity, and interconnects in the third cavity that directly couple first die to the second die.

Provided is an anisotropic conductive adhesive in which excellent optical characteristics and heat dissipation characteristics are obtainable. The anisotropic conductive adhesive contains conductive particles each comprising a metal layer having Ag as a primary constituent formed on an outermost surface of a resin particle, solder particles having a smaller average particle diameter than the conductive particles, reflective insulating particles having a smaller average particle diameter than the solder particles and a binder into which the conductive particles solder particles and reflective insulating particles are dispersed. The conductive particles and the reflective insulating particles efficiently reflect light, thereby improving light-extraction efficiency of an LED mounting body. Additionally, inter-terminal solder bonding of the solder particles during compression bonding increases contact area between opposing terminals, thereby enabling achievement of high heat dissipation characteristics.

The present invention provides a bonding method in semiconductor manufacturing process and a bonding structure formed using the same, which can achieve wafer-level bonding under a condition of normal temperature and low pressure. The bonding method comprises generating bonding structures capable of being mutually mechanical interlocked, wherein the frictional heat generated by the bonding structures capable of being mutually mechanical interlocked is higher than the bonding energy therebetween, and utilizing the frictional heat generated by the bonding structures capable of being mutually mechanical interlocked to bond the bonding structures capable of being mutually mechanical interlocked.

The joint reliability in flip chip bonding of a semiconductor device is enhanced. Prior to flip chip bonding, flux 9 is applied to the solder bumps 5a for flip chip bonding over a substrate and reflow/cleaning is carried out and then flip chip bonding is carried out. This makes is possible to thin the oxide film over the surfaces of the solder bumps 5a and make the oxide film uniform. As a result, it is possible to suppress the production of local solder protrusions to reduce the production of solder bridges during flip chip bonding and enhance the joint reliability in the flip chip bonding of the semiconductor device.

A method of manufacturing an electronic component module and the electronic component module manufactured by the manufacturing method includes bumps, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness and formed on one surface of the substrate. When looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on a side of a corresponding outer terminal closer to a center of the electronic component and the thinner portion is positioned on the opposite side of the corresponding outer terminal. In the plan view, joining portions joining the outer terminals respectively to the bumps are formed such that a height of each joining portion on the opposite side is lower than a height of the joining portion on the side closer to the center of the electronic component.

According to one embodiment, a first electrode is formed on a first face of a first semiconductor chip, and a second electrode and a protrusion are formed on a second face of a second semiconductor chip. The first semiconductor chip and the second semiconductor chip are spaced from one another by the protrusion in such a manner that the first face and the second face face each other. The first semiconductor chip and the second semiconductor chip are subject to reflow to be electrically connected to each other, and then the protrusion is cured at a temperature lower than a reflow temperature.

A method of manufacturing a semiconductor package includes estimating an error in a solder ball attaching process, determining a specification of a ball tool and a method of the solder ball attaching process, based on the estimated error, manufacturing the ball tool according to the determined specification thereof, and performing the solder ball attaching process based on the method of the solder ball attaching process. The determining of the specification of the ball tool and the method of the solder ball attaching process includes determining a number of a plurality of holders in the ball tool and a position and a width of each of the plurality of holders, determining a number of a plurality of working regions of a substrate and a position and a width of each of the plurality of working regions, and dividing a substrate into the plurality of working regions.