A sintering powder comprising: a first type of metal particles having a mean longest dimension of from 100 nm to 50 μm.

A sintering powder comprising: a first type of metal particles having a mean longest dimension of from 100 nm to 50 μm.

Provided are an underfill material capable of realizing low-pressure mounting and voidless mounting, and a method for manufacturing a semiconductor device using the same. The underfill material includes a main composition containing an acrylic polymer, an acrylic monomer, and a maleimide compound, and the acrylic polymer is contained in a range of 10 parts by mass or more and 60 parts by mass or less in 100 parts by mass of the main composition, and the maleimide compound is contained in a range of 20 parts by mass or more and 70 parts by mass or less in 100 parts by mass of the main composition. Low-pressure mounting and the voidless mounting can be realized.

Provided are an underfill material capable of realizing low-pressure mounting and voidless mounting, and a method for manufacturing a semiconductor device using the same. The underfill material includes a main composition containing an acrylic polymer, an acrylic monomer, and a maleimide compound, and the acrylic polymer is contained in a range of 10 parts by mass or more and 60 parts by mass or less in 100 parts by mass of the main composition, and the maleimide compound is contained in a range of 20 parts by mass or more and 70 parts by mass or less in 100 parts by mass of the main composition. Low-pressure mounting and the voidless mounting can be realized.

A substrate is capable of effectively reinforcing a connecting portion between an electronic component and the substrate. The substrate is a substrate on which a first electronic component having a plurality of bumps is to be mounted, and includes a base portion including an insulator and having, on the upper face thereof, at least one groove portion configured to store a tip portion of at least one of the bumps, and includes an electrode formed on at least the bottom face of the groove portion.

A semiconductor device includes a substrate having a plurality of pads on a surface of the substrate, a semiconductor chip that includes a plurality of metal bumps connected to corresponding pads on the substrate, a first resin layer between the surface of the substrate and the semiconductor chip, a second resin layer between the substrate and the semiconductor chip and between the first resin layer and at least one of the metal bumps, and a third resin layer on the substrate and above the semiconductor chip.

A highly reliable bonded structure having excellent thermal fatigue resistance characteristics and thermal stress relaxation characteristics is provided. The bonded structure of the present invention comprises a first member, a second member capable of being bonded to the first member, and a bonding part interposed between a first bond surface at the first member side and a second bond surface at the second member side to bond the first member and the second member. The bonding part has at least a bonding layer, a reinforcing layer, and an intermediate layer. The bonding layer is composed of an intermetallic compound and bonded to the first bond surface.

A method for producing an illumination device may include providing a plurality of optoelectronic semi-conductor components that each have a semi-conductor layer sequence for generating radiation where the semiconductor components each have at least one contact surface on one side and are held by a common carrier. The method may further include electroplating each contact surface of the semi-conductor components using a solder material, applying the semi-conductor components having the solder material to a substrate, and melting and soldering the contact surfaces onto the surfaces.

Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion (2) formed on the upper surface of a semiconductor substrate (1), a passivation layer (3) so formed on the upper surface of the semiconductor substrate (1) as to overlap a part of the electrode pad portion (2) and having a first opening portion (3a) where the upper surface of the electrode pad portion (2) is exposed, a barrier metal layer (5) formed on the electrode pad portion (2), and a solder bump (6) formed on the barrier metal layer (5). The barrier metal layer (5) is formed such that an outer peripheral end (5b) lies within the first opening portion (3a) of the passivation layer (3) when viewed in plan.

An electronic-part-reinforcing thermosetting resin composition has: a viscosity of 5 Pa.Math.s or less at 140° C.; a temperature of 150° C. to 170° C. as a temperature corresponding to a maximum peak of an exothermic curve representing a curing reaction; and a difference of 20° C. or less between the temperature corresponding to the maximum peak and a temperature corresponding to one half of the height of the maximum peak in a temperature rising range of the exothermic curve.