Patent classifications
H01L2224/8122
APPARATUS AND METHOD FOR STACKING SEMICONDUCTOR DEVICES
A method of directly transferring a first semiconductor device die to a substrate includes loading a wafer tape into a first frame, loading a substrate into a second frame, arranging at least one of the first frame or the second frame such that a surface of the substrate is adjacent to a first side of the wafer tape, and orienting a needle to a position adjacent to a second side of the wafer tape, the needle extending in a direction toward the wafer tape. The method also includes activating a needle actuator connected to the needle to move the needle to a die transfer position at which the needle contacts the second side of the wafer tape to press the first semiconductor device die into contact with the second semiconductor device die.
Apparatus and method for transfering semiconductor devices from a substrate and stacking semiconductor devices on each other
An apparatus including components to stack semiconductor device die.
Hybrid Bonding with Uniform Pattern Density
A chip includes a semiconductor substrate, integrated circuits with at least portions in the semiconductor substrate, and a surface dielectric layer over the integrated circuits. A plurality of metal pads is distributed substantially uniformly throughout substantially an entirety of a surface of the chip. The plurality of metal pads has top surfaces level with a top surface of the surface dielectric layer. The plurality of metal pads includes active metal pads and dummy metal pads. The active metal pads are electrically coupled to the integrated circuits. The dummy metal pads are electrically decoupled from the integrated circuits.
SEMICONDUCTOR PACKAGE
Provided is a semiconductor package. The semiconductor package may include a substrate, a semiconductor chip on the substrate, a passive element on the substrate, a conductive structure on the substrate, and an interposer substrate on the semiconductor chip, the passive element, and the conductive structure. The interposer substrate may be electrically connected to the conductive structure. A height of the passive element may be greater than a height of the semiconductor chip.
SEMICONDUCTOR PACKAGE
Provided is a semiconductor package. The semiconductor package may include a substrate, a semiconductor chip on the substrate, a passive element on the substrate, a conductive structure on the substrate, and an interposer substrate on the semiconductor chip, the passive element, and the conductive structure. The interposer substrate may be electrically connected to the conductive structure. A height of the passive element may be greater than a height of the semiconductor chip.
METHOD AND APPARATUS FOR EMBEDDING SEMICONDUCTOR DEVICES
An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second surface that extends in a direction transverse to the first surface. The transfer surface includes ripples in a profile thereof such that an apex on an individual ripple is a point on a first plane and a trough on the individual ripple is a point on a second plane. The semiconductor die is disposed on the transfer surface between the first plane and the second plane such that the second surface of the semiconductor die extends transverse to the first plane and the second plane.
METHOD AND APPARATUS FOR EMBEDDING SEMICONDUCTOR DEVICES
An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second surface that extends in a direction transverse to the first surface. The transfer surface includes ripples in a profile thereof such that an apex on an individual ripple is a point on a first plane and a trough on the individual ripple is a point on a second plane. The semiconductor die is disposed on the transfer surface between the first plane and the second plane such that the second surface of the semiconductor die extends transverse to the first plane and the second plane.
DEVICE AND METHOD FOR REWORKING FLIP CHIP COMPONENTS
A system and method for reworking a flip chip includes use of a mill to remove an old flip chip, and a pick-and-place device for putting a new flip chip in place at the same location. The process may be automated, with the removal and the placement occurring sequentially without need for operator intervention. Other devices and processes may be part of the system/machine and process, for example cleaning following the milling, fluxing prior to the placement, and heating to cause solder reflow, to secure the new flip chip in place. Underfill may be employed to make for a more mechanically robust mounting of the new flip chip.
DEVICE AND METHOD FOR REWORKING FLIP CHIP COMPONENTS
A system and method for reworking a flip chip includes use of a mill to remove an old flip chip, and a pick-and-place device for putting a new flip chip in place at the same location. The process may be automated, with the removal and the placement occurring sequentially without need for operator intervention. Other devices and processes may be part of the system/machine and process, for example cleaning following the milling, fluxing prior to the placement, and heating to cause solder reflow, to secure the new flip chip in place. Underfill may be employed to make for a more mechanically robust mounting of the new flip chip.
Hybrid bonding with uniform pattern density
A chip includes a semiconductor substrate, integrated circuits with at least portions in the semiconductor substrate, and a surface dielectric layer over the integrated circuits. A plurality of metal pads is distributed substantially uniformly throughout substantially an entirety of a surface of the chip. The plurality of metal pads has top surfaces level with a top surface of the surface dielectric layer. The plurality of metal pads includes active metal pads and dummy metal pads. The active metal pads are electrically coupled to the integrated circuits. The dummy metal pads are electrically decoupled from the integrated circuits.