A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

The present invention provides a bonding method in semiconductor manufacturing process and a bonding structure formed using the same, which can achieve wafer-level bonding under a condition of normal temperature and low pressure. The bonding method comprises generating bonding structures capable of being mutually mechanical interlocked, wherein the frictional heat generated by the bonding structures capable of being mutually mechanical interlocked is higher than the bonding energy therebetween, and utilizing the frictional heat generated by the bonding structures capable of being mutually mechanical interlocked to bond the bonding structures capable of being mutually mechanical interlocked.

The invention concerns a method of flip-chip assembly between first (1) and second (2) components each comprising connection pads (11, 21) on one of the faces of same, referred to as assembly faces, which involves transferring the components onto each other via the assembly faces of same in such a way as to create electrical interconnections between the pads of the first and second components. The invention involves transforming the copper oxide into copper by UV annealing, very locally, in the gap between the components, at least around the areas adjacent to the connection pads. The method according to the invention can be used for any component that is transparent to UV rays, including for substrates made from a plastic material such as substrates made from PEN or PET. The invention also concerns the assembly of two components obtained by the method.

A soldering apparatus includes a stage on which a plurality of electronic devices are loaded, a light source disposed on the stage and configured to cast light toward the plurality of electronic devices, and a mask film disposed between the light source and the plurality of electronic devices. The mask film has openings exposing at least a portion of each of the plurality of electronic devices and a guide is connected to the mask film and extends toward the plurality of electronic devices. The guide includes a reflective material.

In a method of soldering electronic devices, a lamp heater may be provided, the lamp heater including a light-emitting portion and a shutter portion, wherein the light-emitting portion is configured to irradiate a first irradiation region, a second irradiation region, and a third irradiation region sequentially arranged in a first direction, wherein the shutter portion provides a first shutter configured to block light to the first irradiation region and a second shutter configured to block light to the third irradiation region. A package array may be disposed on a substrate supply actuator, wherein the package array includes a first package and a second package that are sequentially disposed along the first direction. The substrate supply actuator may be moved in the first direction to sequentially pass the package array through the first irradiation region, the second irradiation region and the third irradiation region. Soldering processes may be performed on the first package and the second package by selectively blocking the light to the first irradiation region and the light to the third irradiation region when the first package and the second package moves through the first irradiation region, the second irradiation region, and the third irradiation region.

An electronic device and a method for forming the same are provided. The method comprises: providing a substrate having a front surface, wherein the substrate comprising at least a non-polar material; providing at least one electronic component with solder bumps mounted on its back surface, wherein the solder bumps are coated with a flux material of at least a polar material, and the at least one electronic component comprises at least a non-polar material; disposing the at least one electronic component onto the front surface of the substrate via the solder bumps; and applying microwave radiation to the at least one electronic component to heat the solder bumps through the flux material.

A chip includes a semiconductor substrate, integrated circuits with at least portions in the semiconductor substrate, and a surface dielectric layer over the integrated circuits. A plurality of metal pads is distributed substantially uniformly throughout substantially an entirety of a surface of the chip. The plurality of metal pads has top surfaces level with a top surface of the surface dielectric layer. The plurality of metal pads includes active metal pads and dummy metal pads. The active metal pads are electrically coupled to the integrated circuits. The dummy metal pads are electrically decoupled from the integrated circuits.

An electronic device and a method for forming the same is provided. The method comprises: providing a first chip comprising first through-silicon vias (TSV) and a second chip comprising second TSVs, wherein first connecting bumps are attached on a lower surface of the first chip, and at least a portion of the first connecting bumps are connected to respective ones of the first TSVs; coating a first flux on the first connecting bumps; contacting the first connecting bumps to an upper surface of the second chip, to form connections between at least a portion of the first connecting bumps and respective ones of the second TSVs; and heating the first connecting bumps and the first flux by irradiating the first connecting bumps and the first flux with microwave, to form connections between the first chip and the second chip.

A semiconductor device has a first electrical component and a second electrical component. A hybrid flux material is deposited over the first electrical component and/or second electrical component. The hybrid flux material can be a flux material with a non-conductive film or non-conductive paste. The second electrical component is stacked over the first electrical component. The first electrical component can be a semiconductor wafer or semiconductor die, and the second electrical component can be a semiconductor wafer or semiconductor die. An interconnect structure is formed between the first electrical component and second electrical component using a VFM signal. Heat can be applied during or after the VFM signal. The interconnect structure can be a bump. An encapsulant is deposited over the first electrical component and second electrical component. The encapsulated and stacked electrical components can be mounted to an interconnect substrate as a HBM module.