H01L2224/81395

HIGH-PRECISION PRINTED STRUCTURES

An example of a printed structure comprises a target substrate and a structure protruding from a surface of the target substrate. A component comprising a component substrate separate and independent from the target substrate is disposed in alignment with the structure on the surface of the target substrate within 1 micron of the structure. An example method of making a printed structure comprises providing the target substrate with the structure protruding from the target substrate, a transfer element, and a component adhered to the transfer element. The component comprises a component substrate separate and independent from the target substrate. The transfer element and adhered component move vertically toward the surface of the target substrate and horizontally towards the structure until the component physically contacts the structure or is adhered to the surface of the target substrate. The transfer element is separated from the component.

WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING WIRING SUBSTRATE
20200303293 · 2020-09-24 ·

A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor package structure includes a first insulating layer, a first conductive layer, a multi-layered circuit structure, a protection layer, and a semiconductor chip electrically connected to the multi-layered circuit structure. The first insulating layer defines a first through hole extending through the first insulating layer. The first conductive layer includes a conductive pad disposed in the first through hole and a trace disposed on an upper surface of the first insulating layer. The multi-layered circuit structure is disposed on an upper surface of the first conductive layer. The multi-layered circuit structure includes a bonding region disposed on the conductive pad of the first conductive layer and an extending region disposed on the trace of the first conductive layer. The protection layer covers the upper surface of the first insulating layer and the extending region of the multi-layered circuit structure, and exposes the bonding region of the multi-layered circuit structure.

ELECTRONIC DEVICE
20200258832 · 2020-08-13 ·

An electronic device includes a first metal plate including a first wiring and a second wiring, an electronic component mounted on a lower surface of the first wiring so as to overlap the second wiring in plan view, a second metal plate including an electrode electrically connected to the lower surface of the first wiring, and an insulation layer filling a space between the first metal plate, the second metal plate, and the electronic component and covering the electronic component. The upper surface of the second wiring is exposed from the insulation layer.

CHIPLETS WITH CONNECTION POSTS

A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

High-precision printed structures

An example of a printed structure comprises a target substrate and a structure protruding from a surface of the target substrate. A component comprising a component substrate separate and independent from the target substrate is disposed in alignment with the structure on the surface of the target substrate within 1 micron of the structure. An example method of making a printed structure comprises providing the target substrate with the structure protruding from the target substrate, a transfer element, and a component adhered to the transfer element. The component comprises a component substrate separate and independent from the target substrate. The transfer element and adhered component move vertically toward the surface of the target substrate and horizontally towards the structure until the component physically contacts the structure or is adhered to the surface of the target substrate. The transfer element is separated from the component.

System and Method to Enhance Solder Joint Reliability

A reliability cover that is disposed over at least one of an integrated circuit package and a Si die of the integrated circuit package is disclosed. The integrated circuit package is mountable to a printed circuit board via a plurality of solder balls. The reliability cover is configured to reduce a difference in a coefficient of thermal expansion between the integrated circuit package and the printed circuit board, and between the Si die and a substrate of the integrated circuit package by a threshold value.

METHODS OF MAKING PRINTED STRUCTURES

An example of a method of making a printed structure comprises providing a destination substrate, contact pads disposed on the destination substrate, and a layer of adhesive disposed on the destination substrate. A stamp with a component adhered to the stamp is provided. The component comprises a stamp side in contact with the stamp and a post side opposite the stamp side, a circuit, and connection posts extending from the post side. Each of the connection posts is electrically connected to the circuit. The component is pressed into contact with the adhesive layer to adhere the component to the destination substrate and to form a printed structure having a volume defined between the component and the destination substrate. The stamp is removed and the printed structure is processed to fill or reduce the volume.

High density package interconnects

Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Semiconductor package structure and method for manufacturing the same

A semiconductor package structure includes a first insulating layer, a first conductive layer, a multi-layered circuit structure, a protection layer, and a semiconductor chip electrically connected to the multi-layered circuit structure. The first insulating layer defines a first through hole extending through the first insulating layer. The first conductive layer includes a conductive pad disposed in the first through hole and a trace disposed on an upper surface of the first insulating layer. The multi-layered circuit structure is disposed on an upper surface of the first conductive layer. The multi-layered circuit structure includes a bonding region disposed on the conductive pad of the first conductive layer and an extending region disposed on the trace of the first conductive layer. The protection layer covers the upper surface of the first insulating layer and the extending region of the multi-layered circuit structure, and exposes the bonding region of the multi-layered circuit structure.