Patent classifications
H01L2224/81399
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
A semiconductor package includes: a lower redistribution structure including a lower redistribution insulation layer, a bump pad in the lower redistribution insulation layer, and a lower redistribution pattern electrically connected to the bump pad, wherein the lower redistribution insulation layer includes: one or more sidewalls at least partially defining a cavity extending from a bottom surface of the lower redistribution insulation layer to an upper surface of the lower redistribution insulation layer; a passive component in the cavity of the lower redistribution insulation layer; an insulation filler in the cavity of the lower redistribution insulation layer, the insulation filler covering sidewalls of the passive component; a first semiconductor chip on the lower redistribution structure, the first semiconductor chip electrically connected to both the lower redistribution pattern and the passive component; and an external connection bump connected to the bump pad via a pad opening of the lower redistribution insulation layer.
Semiconductor package and method for manufacturing the same
A semiconductor device includes a first passivation layer over a circuit and. conductive pad over the first passivation layer, wherein the conductive pad is electrically connected to the circuit. A second passivation layer is disposed over the conductive pad and the first passivation layer, and has a first opening and a second opening. The first opening exposes an upper surface of a layer that extends underneath the conductive pad, and the second opening exposes the conductive pad. A first insulating layer is disposed over the second passivation layer and filling the first and second openings. A through substrate via extends through the insulating layer, second passivation layer, passivation layer, and substrate. A side of the through substrate via and the second passivation layer have a gap that is filled with the first insulating layer. A conductive via extends through the first insulating layer and connecting to the conductive pad.
Semiconductor package and method for manufacturing the same
A semiconductor device includes a first passivation layer over a circuit and. conductive pad over the first passivation layer, wherein the conductive pad is electrically connected to the circuit. A second passivation layer is disposed over the conductive pad and the first passivation layer, and has a first opening and a second opening. The first opening exposes an upper surface of a layer that extends underneath the conductive pad, and the second opening exposes the conductive pad. A first insulating layer is disposed over the second passivation layer and filling the first and second openings. A through substrate via extends through the insulating layer, second passivation layer, passivation layer, and substrate. A side of the through substrate via and the second passivation layer have a gap that is filled with the first insulating layer. A conductive via extends through the first insulating layer and connecting to the conductive pad.
Semiconductor structures
A semiconductor structure includes a first substrate including a first pad thereover, a second substrate including a bump thereover and a dielectric material. The first pad includes an inner portion and an outer portion being higher than and surrounding the inner portion. The bump is bonded to the inner portion and surrounded by the outer portion. The dielectric material is disposed between the first substrate and the second substrate to encapsulate the first pad and the bump.
Semiconductor structures
A semiconductor structure includes a first substrate including a first pad thereover, a second substrate including a bump thereover and a dielectric material. The first pad includes an inner portion and an outer portion being higher than and surrounding the inner portion. The bump is bonded to the inner portion and surrounded by the outer portion. The dielectric material is disposed between the first substrate and the second substrate to encapsulate the first pad and the bump.
Processes for forming self-healing solder joints and repair of same, related solder joints, and microelectronic components, assemblies and electronic systems incorporating such solder joints
Solder joints comprising two different solder materials having different melting points, an outer solder material extending over an inner solder material bonded to a conductive pad, the inner solder material having a lower melting point than a melting point of the outer solder material and being in a solid state at substantially ambient temperature. A metal material having a higher melting point than a melting point of either solder material may coat at least a portion of the inner solder material. Microelectronic components, assemblies and electronic systems incorporating the solder joints, as well as processes for forming and repairing the solder joints are also disclosed.
Processes for forming self-healing solder joints and repair of same, related solder joints, and microelectronic components, assemblies and electronic systems incorporating such solder joints
Solder joints comprising two different solder materials having different melting points, an outer solder material extending over an inner solder material bonded to a conductive pad, the inner solder material having a lower melting point than a melting point of the outer solder material and being in a solid state at substantially ambient temperature. A metal material having a higher melting point than a melting point of either solder material may coat at least a portion of the inner solder material. Microelectronic components, assemblies and electronic systems incorporating the solder joints, as well as processes for forming and repairing the solder joints are also disclosed.
Electronic device module and manufacturing method thereof
An electronic device module includes a first board including a first side and a second side facing in opposite directions, the first side of the first board being configured to have a first electronic device mounted thereon; a second board adhered to the second side of the first board, and including a device accommodating portion that is a space formed by removing a central portion of the second board; a second electronic device disposed in the device accommodating portion and mounted on the second side of the first board so that the second electronic device is adjacent to an internal edge side of the second board defining a boundary of the device accommodating portion; and a bonding layer disposed in a gap between the first board and the second board and extending into a gap between the second side of the first board and the second electronic device, the bonding layer bonding the second board and the second electronic device to the first board.
Electronic device module and manufacturing method thereof
An electronic device module includes a first board including a first side and a second side facing in opposite directions, the first side of the first board being configured to have a first electronic device mounted thereon; a second board adhered to the second side of the first board, and including a device accommodating portion that is a space formed by removing a central portion of the second board; a second electronic device disposed in the device accommodating portion and mounted on the second side of the first board so that the second electronic device is adjacent to an internal edge side of the second board defining a boundary of the device accommodating portion; and a bonding layer disposed in a gap between the first board and the second board and extending into a gap between the second side of the first board and the second electronic device, the bonding layer bonding the second board and the second electronic device to the first board.
Wiring board
A wiring board includes an insulating base including a first principal surface, a second principal surface opposite to the first principal surface, and a first through hole penetrating the insulating base from the first principal surface to the second principal surface, a functional material provided inside the first through hole, a first insulating layer covering the first principal surface, and a first surface of the functional material, and a second insulating layer covering the second principal surface, and a second surface of functional material. A second through hole is formed in the first insulating layer, the functional material, and the second insulating layer, and a conductive layer is formed on a wall surface of the second through hole.