Provided is an electrode like a protruding electrode that is self-standing on a substrate. A conductive paste (202) contains a conductive powder, an alcoholic liquid component, and no adhesives. The conductive powder contains conductive particles having a thickness of 0.05 m or more and 0.1 m or less and a representative length of 5 m or more and 10 m or less, the representative length being a maximum diameter in a plane perpendicular to the direction of the thickness. The weight percentage of the alcoholic liquid component relative to the conductive paste is 8% or more and 20% or less.

A semiconductor device includes an electric conductor, a semiconductor element, and a bonding layer. The electric conductor has a main surface and a rear surface opposite to the main surface in a thickness direction. The semiconductor element includes a main body and electrodes. The main body has a side facing the main surface of the conductor, and the electrodes each protrude toward the main surface from the side of the main body to be electrically connected to the main surface. The bonding layer is held in contact with the main surface and the electrodes. Each electrode includes a base portion in contact with the main body, and a columnar portion protruding toward the main surface from the base portion to be held in contact with the bonding layer, which is a sintered body of a metal powder.

A semiconductor structure which includes a first semiconductor substrate having a first plurality of copper connectors; a second semiconductor substrate having a second plurality of copper connectors; and a joining structure joining the first plurality of copper connectors to the second plurality of copper connectors, the joining structure including a copper intermetallic mesh having pores filled with silver.

A semiconductor structure which includes a first semiconductor substrate having a first plurality of copper connectors; a second semiconductor substrate having a second plurality of copper connectors; and a joining structure joining the first plurality of copper connectors to the second plurality of copper connectors, the joining structure including a copper intermetallic mesh having pores filled with silver. There is also a method for joining two semiconductor substrates.

Embodiments herein relate to a system in package (SiP). The SiP may have a first layer of one or more first functional components with respective first active sides and first inactive sides opposite the first active sides. The SiP may further include a second layer of one or more second functional components with respective second active sides and second inactive sides opposite the second active sides. In embodiments, one or more of the first active sides are facing and electrically coupled with one or more of the second active sides through a through-mold via or a through-silicon via.

A first side of a tapeless leadframe package is etched to form a ring shaped protrusion and a lead protrusion extending from a base layer. An integrated circuit die is mounted to tapeless leadframe package in flip chip orientation with a front side facing the first side. An electrical and mechanical attachment is made between a bonding pad of the integrated circuit die and the lead protrusion. A mechanical attachment is made between the front side of the integrated circuit die and the ring shaped protrusion. The integrated circuit die and the protrusions from the tapeless leadframe package are encapsulated within an encapsulating block. The second side of the tapeless leadframe package is then etched to remove portions of the base layer and define a lead for a leadframe from the lead protrusion and further define a die support for the leadframe from the ring shaped protrusion.

A semiconductor chip stack includes a first semiconductor chip, a second semiconductor chip, and a connection via which the first electrode and the second electrode are electrically connected to each other. The connection includes a first column and a second column. The first column is constituted by a material having a higher degree of activity with respect to heat than a material that constitutes the second column and is smaller in volume than the second column. Further, the connection has an aspect ratio of 0.5 or higher in a height direction.

A method for forming an ultrafine-pitch all-copper interconnect structure is provided. Nano-copper particles are mixed with a solvent, a dispersant and a viscosity modifier to prepare a nano-copper paste. A chip with a preset number of copper pillars having a preset diameter and a substrate are selected, cleaned and pretreated. The chip is sucked and flipped by a bonding machine to make the copper pillars face outward. The chip is sucked through a suction nozzle of the bonding machine and dipped in the nano-copper paste. A protective gas is fed, and the copper pillars are aligned with copper pads on the substrate through an optical system of the bonding machine, bonded with the substrate at a preset pressure and temperature under ultrasonication, and cooled at room temperature to obtain the interconnect structure. An ultrafine-pitch all-copper interconnect structure fabricated by the method is also provided.

Disclosed herein is a semiconductor device including a conductive member that has a main surface facing in a thickness direction, a semiconductor element that has a plurality of pads facing the main surface, a plurality of electrodes that are individually formed with respect to the plurality of pads and protrude from the plurality of pads toward the main surface, and a bonding layer for electrically bonding the main surface to the plurality of electrodes. The bonding layer includes a first region having conductivity and a second region having electrical insulation. The first region includes a metal portion. At least a part of the second region includes a resin portion.

A die bonding process for assembling a semiconductor device includes the steps of applying a sintered-silver-use paste to each of a plurality of first regions on an upper surface of a chip mounting part, drying the sintered-silver-use paste and applying a silver paste to a second region located between/among the respective first regions. Further, the process includes the step of mounting a semiconductor chip onto the chip mounting part in such a manner that a rear surface of the semiconductor chip faces an upper surface of the chip mounting part with the sintered-silver-use paste and the silver paste being interposed. After mounting the chip, part of each of first, second, third and fourth corners of a principal surface of the semiconductor chip is located in each of the first regions.