A solder bump formed on an Ni electrode with the use of a solder ball containing Bi as a main component and Sn as a sub component. The solder ball contains Sn from 1.0 to 10.0 mass % and at most 1.0 mass % of at least one of Cu and Ag. A solder joint portion obtained by use of the solder bump has at least one of Sn and an SnBi eutectic alloy.

A chip package structure is provided. The chip package structure includes a first wiring substrate comprising a substrate, a first pad, a second pad, and an insulating layer. The first pad and the second pad are respectively over a first surface and a second surface of the substrate, the first surface is opposite to the second surface, the insulating layer is over the first surface and partially covers the first pad, and the first pad is wider than the second pad. The chip package structure includes a nickel-containing layer over the first pad. The chip package structure includes a conductive protection layer over the nickel-containing layer. The conductive protection layer has a curved surface, and a recess is surrounded by the curved surface and an inner wall of the insulating layer over the first pad.

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

A method of manufacturing a semiconductor package including coating a flux on a connection pad provided on a first surface of a substrate, the flux including carbon nanotubes (CNTs), placing a solder ball on the connection pad coated with the flux, forming a solder layer attached to the connection pad from the solder ball through a reflow process, and mounting a semiconductor chip on the substrate such that the solder layer faces a connection pad in the semiconductor chip may be provided.

Disclosed herein is a method that includes picking up a plate with a nozzle, the plate including at least one opening to allow air to flow therethrough. The method includes picking up a die with the nozzle such that the plate is located between the nozzle and the die. The method includes placing the die and the plate onto a device, substrate or another die such that the plate is located on top of the die. The method includes heating the device, substrate or another die and the die in a heat chamber while the plate remains on top of the die to permanently attach the die to the device, substrate or another die. Further disclosed herein is an assembly system configured to perform a method that utilizes the plate and die combination for attaching the die to a device, substrate or another die by heating.

MicroLED devices can be transferred in large numbers to form microLED displays using processes such as pick-and-place, thermal adhesion transfer, or fluidic transfer. A blanket solder layer can be applied to connect the bond pads of the microLED devices to the terminal pads of a support substrate. After heating, the solder layer can connect the bond pads with the terminal pads in vicinity of each other. The heated solder layer can correct misalignments of the microLED devices due to the transfer process.

MicroLED devices can be transferred in large numbers to form microLED displays using processes such as pick-and-place, thermal adhesion transfer, or fluidic transfer. A blanket solder layer can be applied to connect the bond pads of the microLED devices to the terminal pads of a support substrate. After heating, the solder layer can connect the bond pads with the terminal pads in vicinity of each other. The heated solder layer can correct misalignments of the microLED devices due to the transfer process.

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.