There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.

The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.

Copper electroplating compositions which include an imidazole compound enables the electroplating of copper having uniform morphology on substrates. The composition and methods of enable copper electroplating of photoresist defined features. Such features include pillars, bond pads and line space features.

Copper electroplating compositions which include an imidazole compound enables the electroplating of copper having uniform morphology on substrates. The composition and methods of enable copper electroplating of photoresist defined features. Such features include pillars, bond pads and line space features.

The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

A substrate bonding method includes: providing a first and a second substrate; forming, on the first substrate, a first metal micro-bump array including first metal pillar(s) formed on the first substrate and first metal nanowires formed thereon and spaced apart from each other; forming, on the second substrate, a second metal micro-bump array including second metal pillar(s) formed on the second substrate and second metal nanowires formed thereon and spaced apart from each other; pressing the first substrate onto the second substrate, such that the first and second metal micro-bump arrays are positioned and staggered with each other, forming a physically interwoven interlocking structure between the first and second metal nanowires; applying a filling material between the first and second substrates; curing the filling material to form a bonding cavity; and then performing confined heating reflux on the first and second metal micro-bump arrays in the bonding cavity.

The present disclosure relates to a cooling stage for cooling down a heated carrier on which a plurality of components has been mounted. Further aspects of the present disclosure relate to a pick-and-place apparatus that includes such a cooling stage and to a method for cooling down a heated carrier on which a plurality of components has been mounted. The cooling stage according to an aspect of the present disclosure uses supporting members for keeping the heated carrier separated from a cooling body. By relying on thermal convection between the heated carrier and the cooling body, dependency of the cooling stage on the type of carrier used is reduced compared to known cooling stages. For example, for different types of carries, it generally suffices to use different supporting members, e.g. having a different height, and/or to use a different temperature of the cooling body.

The present invention provides a highly reliable solder joint, the solder joint including a solder joint layer having a melted solder material containing Sn as a main component and further containing Ag and/or Sb and/or Cu; and a joined body including a NiPCu plating layer on a surface in contact with the solder joint layer, wherein the NiPCu plating layer contains Ni as a main component and contains 0.5% by mass or greater and 8% by mass or less of Cu and 3% by mass or greater and 10% by mass or less of P, the NiPCu plating layer has a microcrystalline layer at an interface with the solder joint layer, and the microcrystalline layer includes a phase containing microcrystals of a NiCuP ternary alloy, a phase containing microcrystals of (Ni,Cu).sub.3P, and a phase containing microcrystals of Ni.sub.3P.

An embodiment bump on trace (BOT) structure includes a contact element supported by an integrated circuit, an under bump metallurgy (UBM) feature electrically coupled to the contact element, a metal ladder bump mounted on the under bump metallurgy feature, the metal ladder bump having a first tapering profile, and a substrate trace mounted on a substrate, the substrate trace having a second tapering profile and coupled to the metal ladder bump through direct metal-to-metal bonding. An embodiment chip-to-chip structure may be fabricated in a similar fashion.