For example, a semiconductor device capable of achieving a high performance applicable to an SR motor is provided. The semiconductor device includes a chip mounting portion TAB1 on which a semiconductor chip CHP1 having an IGBT is mounted, and a chip mounting portion TAB2 on which a semiconductor chip CHP2 having a diode is formed. The semiconductor device also includes a lead LD1A electrically connected to an emitter electrode pad EP of the semiconductor chip CHP1 via a clip CLP1, and a lead LD1B electrically connected to an anode electrode pad ADP of the semiconductor chip CHP2 via a clip CLP2. At this time, the chip mounting portion TAB1 is separated electrically from the chip mounting portion TAB2, and the clip CLP1 is separated electrically from the clip CLP2.

One aspect of the invention relates to a method for producing a chip assemblage. Two or more chip assemblies are produced in each case by cohesively and electrically conductively connecting an electrically conductive first compensation lamina to a first main electrode of a semiconductor chip. A control electrode interconnection structure is arranged in a free space between the chip assemblies. Electrically conductive connections are produced between the control electrode interconnection structure and control electrodes of the semiconductor chips of the individual chip assemblies. The chip assemblies are cohesively connected by means of a dielectric embedding compound.

A semiconductor package fabrication method comprises the steps of providing a wafer, applying a seed layer, forming a photo resist layer, plating a copper layer, removing the photo resist layer, removing the seed layer, applying a grinding process, forming metallization, and applying a singulation process. A semiconductor package comprises a silicon layer, an aluminum layer, a passivation layer, a polyimide layer, a copper layer, and metallization. In one example, an area of a contact area of a gate clip is smaller than an area of a gate copper surface. The area of the contact area of the gate clip is larger than a gate aluminum surface. In another example, an area of a contact area of a gate pin is larger than an area of a gate copper surface. The area of the contact area of the gate pin is larger than a gate aluminum surface.

A method of manufacturing a substrate layered body includes: a step of applying a bonding material to the surface of at least one of a first substrate or a second substrate; a step of curing the bonding material applied on the surface to form a bonding layer having a reduced modulus at 23° C. of 10 GPa or less; and a step of bonding the first substrate and the second substrate via the bonding layer formed.

A semiconductor device encompasses a cooler made of ceramics, having a first main face and a second main face, being parallel and opposite to the first main face, defined by two opposite side faces perpendicular to the first and second main faces, a plurality of conductive-pattern layers delineated on the first main face, a semiconductor chip mounted on the first main face via one of the plurality of conductive-pattern layers, and a seal member configured to seal the semiconductor chip.

A semiconductor device includes a base body, a semiconductor chip deposited on a top surface of the base body, an encapsulating resin covering the base body and the semiconductor chip, a ring-shaped plug, and at least one stand-up terminal. The ring-shaped plug has an insulating property, is buried in a part of an upper part of the encapsulating resin while being aligned with respect to the base body, and has a top surface exposed to an outside of the encapsulating resin. The at least one stand-up terminal includes a vertical part penetrating the ring-shaped plug and extending in a direction perpendicular to the top surface of the base body, and has a lower end electrically connected to an electrode of the semiconductor chip inside the encapsulating resin and an upper end exposed to the outside of the encapsulating resin. The ring-shaped plug is fixed and bonded to a circumference of a side surface of the vertical part of the stand-up terminal.

A semiconductor device includes a base body, a semiconductor chip deposited on a top surface of the base body, an encapsulating resin covering the base body and the semiconductor chip, a ring-shaped plug, and at least one stand-up terminal. The ring-shaped plug has an insulating property, is buried in a part of an upper part of the encapsulating resin while being aligned with respect to the base body, and has a top surface exposed to an outside of the encapsulating resin. The at least one stand-up terminal includes a vertical part penetrating the ring-shaped plug and extending in a direction perpendicular to the top surface of the base body, and has a lower end electrically connected to an electrode of the semiconductor chip inside the encapsulating resin and an upper end exposed to the outside of the encapsulating resin. The ring-shaped plug is fixed and bonded to a circumference of a side surface of the vertical part of the stand-up terminal.

A semiconductor device has a leadframe and a first electrical component disposed over the leadframe. A clip bond is disposed over the first electrical component. The clip bond has a plurality of recesses each having a different depth. A first recess is proximate to a first distal end of the first electrical component, and a second recess is proximate to a second distal end of the first electrical component opposite the first distal end of the first electrical component. A depth of the first recess is different from a depth of the second recess. A third recess is over a surface of the first electrical component. A depth of the third recess is different from the depth of the first recess and the depth of the second recess. A second electrical component is disposed over the leadframe. The clip bond extends over the second electrical component.

A system and method for manufacturing a packaged component are disclosed. An embodiment comprises forming a plurality of components on a carrier, the plurality of components being separated from each other by kerf regions on a front side of the carrier and forming a metal pattern on a backside of the carrier, wherein the metal pattern covers the backside of the carrier except over regions corresponding to the kerf regions. The method further comprises generating the component by separating the carrier.

A system and method for manufacturing a packaged component are disclosed. An embodiment comprises forming a plurality of components on a carrier, the plurality of components being separated from each other by kerf regions on a front side of the carrier and forming a metal pattern on a backside of the carrier, wherein the metal pattern covers the backside of the carrier except over regions corresponding to the kerf regions. The method further comprises generating the component by separating the carrier.