H01L2224/85801

Semiconductor device and method of fabricating same

A semiconductor device includes, an alloy layer sandwiched between a first Ag layer formed on a mounting board or circuit board and a second Ag layer formed on a semiconductor element, wherein the alloy layer contains an intermetallic compound of Ag.sub.3Sn formed by Ag components of the first Ag layer and the second Ag layer and Sn, and wherein a plurality of wires containing Ag are arranged extended from an outside-facing periphery of the alloy layer.

POWER MODULES HAVING ENCAPSULATION STRESS AND STRAIN MITIGATING CONFIGURATIONS
20250149395 · 2025-05-08 ·

A power module includes at least one power substrate; a plurality of power devices on at least one power substrate; power contacts; power wire bonds; and a composite physical containment structure having a composite element and an encapsulation material. The composite element may include a membrane structure, a dam structure and/or a glob structure; and a portion of the composite physical containment structure is arranged at least partially on the plurality of power devices, the power wire bonds, and/or the at least one power substrate.

OPTICAL SENSOR PACKAGE

An optical sensor module includes a glass lid that protects the sensor die, and a perimeter frame to secure the glass lid. The perimeter frame can hold the glass lid in a position suspended above the sensor die and spaced apart from the sensor die by an air gap. An epoxy seals the glass lid between the perimeter frame and the package. The addition of the perimeter frame creates a longer path length for moisture and gas penetration, preventing moisture from reaching the sensor die, while allowing light to enter the sensor die.

Package geometries to enable visual inspection of solder fillets

In examples, a method of manufacturing a semiconductor package comprises providing an array of unsingulated semiconductor packages, the array having a bottom surface and a conductive terminal exposed to the bottom surface, the conductive terminal including a slot configured to receive solder material. The method includes coupling a tape to the array of unsingulated semiconductor packages and applying a first saw blade to the bottom surface of the array to partially saw through a thickness of the array to a depth between two individual, adjacent, unsingulated semiconductor packages in the array of unsingulated semiconductor packages, the first saw blade producing a kerf. The method includes applying a second saw blade into the kerf to fully saw through the thickness of the array and produce a singulated semiconductor package, a width of the second saw blade narrower than the first saw blade. The conductive terminal is exposed to a side surface of the singulated semiconductor package, the side surface including a recessed area having a horizontal depth of no more than 30 microns.

PACKAGE GEOMETRIES TO ENABLE VISUAL INSPECTION OF SOLDER FILLETS
20250336730 · 2025-10-30 ·

In examples, a method of manufacturing a semiconductor package comprises providing an array of unsingulated semiconductor packages, the array having a bottom surface and a conductive terminal exposed to the bottom surface, the conductive terminal including a slot configured to receive solder material. The method includes coupling a tape to the array of unsingulated semiconductor packages and applying a first saw blade to the bottom surface of the array to partially saw through a thickness of the array to a depth between two individual, adjacent, unsingulated semiconductor packages in the array of unsingulated semiconductor packages, the first saw blade producing a kerf. The method includes applying a second saw blade into the kerf to fully saw through the thickness of the array and produce a singulated semiconductor package, a width of the second saw blade narrower than the first saw blade. The conductive terminal is exposed to a side surface of the singulated semiconductor package, the side surface including a recessed area having a horizontal depth of no more than 30 microns.