Embodiments of the present invention disclose a computer system having a plurality of quantum circuits arranged in a two-dimensional plane-like structure, the quantum circuits comprising qubits and busses (i.e., qubit-qubit interconnects), and a method of formation therefor. A quantum computer system comprises a plurality of quantum circuits arranged in a two-dimensional pattern. At least one interior quantum circuit, not along the perimeter of the two-dimensional plane of the plurality of quantum circuits, contains a bottom chip, a device layer, a top chip, and a routing layer. A signal wire connects the device layer to the routing layer, wherein the signal wire breaks the two dimensional plane, for example, the signal wire extends into a different plane.

A method of manufacturing a semiconductor device that includes an insulated circuit board having a conductive pattern, a first semiconductor chip with a rectangular shape connected through a first joining material to the conductive pattern, a second semiconductor chip with a rectangular shape disposed on the conductive pattern separated from the first semiconductor chip and connected through a second joining material to the conductive pattern, a terminal disposed above the semiconductor chips, respectively connected to the first and second semiconductor chips through third and fourth joining materials, the terminal having a through-hole above a place between the first and second semiconductor chips, the method including a positioning step in which the first and second semiconductor chips are respectively positioned at at least three positioning places, and at least one of the positioning places is positioned with a positioning member inserted into the through-hole.

An exemplary semiconductor device can comprise a die, a redistribution structure (RDS), an interconnect, a conductive strap, an encapsulant, and an EMI shield. The redistribution structure can comprise an RDS top surface coupled to the die bottom side. The interconnect can be coupled to the RDS bottom surface. The conductive strap can be coupled to the RDS, and can comprise a strap inner end coupled to the RDS bottom surface, and a strap outer end located lower than the RDS bottom surface. The encapsulant can encapsulate the conductive strap and the RDS bottom surface. The EMI shield can cover and contact the encapsulant sidewall and the strap outer end. Other examples and related methods are also disclosed herein.

Embodiments of the present disclosure are directed to leadframes having the cantilevered extension that includes an integral support on the end of the lead nearest the die pad. A support integral to the leadframe allows the support to be built to the proper height to support the cantilevered lead in each package and reduces or eliminates the upward, downward, and side to side deflections caused or allowed by supports built-in to the tooling of the manufacturing equipment. Also, by building the support into the leadframe, the leadframes may be pretaped prior to the die attach and wire bonding steps of the manufacturing process.

Embodiments of the present invention disclose a computer system having a plurality of quantum circuits arranged in a two-dimensional plane-like structure, the quantum circuits comprising qubits and busses (i.e., qubit-qubit interconnects), and a method of formation therefor. A quantum computer system comprises a plurality of quantum circuits arranged in a two-dimensional pattern. At least one interior quantum circuit, not along the perimeter of the two-dimensional plane of the plurality of quantum circuits, contains a bottom chip, a device layer, a top chip, and a routing layer. A signal wire connects the device layer to the routing layer, wherein the signal wire breaks the two dimensional plane, for example, the signal wire extends into a different plane.

A semiconductor device including: an insulating substrate having a conductor layer on the upper face and the lower face and a semiconductor element mounted on the upper conductor layer; a base plate bonded to the lower conductor layer; a case member surrounding the insulating substrate and bonded to the surface of the base plate to which the conductor layer bonded to the lower face; a first filler being a silicone composition filled in a region surrounded by the base plate and the case member; and a second filler being injected into a region below the first filler and surrounding a peripheral edge portion of the insulating substrate, whose height from the base plate is higher than the upper face and is lower than a bonding face between the semiconductor element and the upper conductor layer.

An exemplary semiconductor device can comprise a die, a redistribution structure (RDS), an interconnect, a conductive strap, an encapsulant, and an EMI shield. The redistribution structure can comprise an RDS top surface coupled to the die bottom side. The interconnect can be coupled to the RDS bottom surface. The conductive strap can be coupled to the RDS, and can comprise a strap inner end coupled to the RDS bottom surface, and a strap outer end located lower than the RDS bottom surface. The encapsulant can encapsulate the conductive strap and the RDS bottom surface. The EMI shield can cover and contact the encapsulant sidewall and the strap outer end. Other examples and related methods are also disclosed herein.

The present invention relates to an electronic circuit arrangement (10) comprising: a substrate (12) having a first surface (12a) and a second surface (12b), an electronic circuit, an electrical connection part (16) for providing an electrical connection to the electronic circuit and being arranged on the first surface (12a), and at least one electrical wire (18). The electrical wire (18) comprises at least one conductive core (20) and an isolation (22) surrounding the conductive core (20). An end portion (18a) of the electrical wire (18) is an isolation-free portion for allowing access to the conductive core (20), wherein the end portion (18a) of the electrical wire (18) is connected to the electrical connection part (16). At least one through-hole (24) extending from the first surface (12a) to the second surface (12b) is provided in the substrate (12), wherein the electrical wire (18) is arranged through the through-hole (24).

The present invention relates to an electronic circuit arrangement (10) comprising: a substrate (12) having a first surface (12a) and a second surface (12b), an electronic circuit, an electrical connection part (16) for providing an electrical connection to the electronic circuit and being arranged on the first surface (12a), and at least one electrical wire (18). The electrical wire (18) comprises at least one conductive core (20) and an isolation (22) surrounding the conductive core (20). An end portion (18a) of the electrical wire (18) is an isolation-free portion for allowing access to the conductive core (20), wherein the end portion (18a) of the electrical wire (18) is connected to the electrical connection part (16). At least one through-hole (24) extending from the first surface (12a) to the second surface (12b) is provided in the substrate (12), wherein the electrical wire (18) is arranged through the through-hole (24).

The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.