Patent classifications
H01L2224/8592
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor element, a lead frame, a conductive member, a resin composition and a sealing resin. The semiconductor element has an element front surface and an element back surface facing away in a first direction. The semiconductor element is mounted on the lead frame. The conductive member is bonded to the lead frame, electrically connecting the semiconductor element and the lead frame. The resin composition covers a bonded region where the conductive member and lead frame are bonded while exposing part of the element front surface. The sealing resin covers part of the leadframe, the semiconductor element, and the resin composition. The resin composition has a greater bonding strength with the lead frame than a bonding strength between the sealing resin and lead frame and a greater bonding strength with the conductive member than a bonding strength between the sealing resin and conductive member.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package, the third terminal being electrically connected to the fourth electrode; a plurality of fourth terminals provided on the semiconductor package, the fourth terminals being electrically connected to the first control electrode; and a plurality of fifth terminals provided on the semiconductor package, the fifth terminals being electrically connected to the second control electrode, and the fifth terminals being lined up in the first direction.
Light emitting device and method of manufacturing light emitting device
A method of manufacturing a light emitting device that comprises a first cover member and a second cover member, includes: providing a package that comprises a substrate, a plurality of resin walls, and a recessed part defined by an upper surface of the substrate and lateral surfaces of the plurality of resin walls, wherein the substrate includes a grooved part surrounding a first region; mounting a light emitting element in the first region; forming the second cover member in a region between the lateral surfaces defining the recessed part to an upper edge of an outer perimeter of the grooved part; forming the first cover member, which comprises depositing an uncured resin on the second cover member, and allowing the uncured resin to flow into a groove of the grooved part; and forming a light transmitting member on the first cover member and the light emitting element.
Storage device including semiconductor chips sealed with resin on metal plate
A semiconductor device includes a metal plate; a sidewall member surrounding a periphery of a space above the metal plate; a circuit board provided on the metal plate; a semiconductor chip provided on the circuit board; a first wire connecting the semiconductor chip and an interconnect part of the circuit board; a first resin member covering a bonding portion between the semiconductor chip and the first wire; and a second resin member provided in the space, the second resin member covering an upper surface of the metal plate, the circuit board, the first resin member, and the first wire. A Young's modulus of the first resin member is greater than a Young's modulus of the second resin member. A volume of the second resin member is greater than a volume of the first resin member.
MOTION SENSOR ROBUSTNESS UTILIZING A ROOM-TEMPERATURE-VOLCANIZING MATERIAL VIA A SOLDER RESIST DAM
Improving motion sensor robustness utilizing a room-temperature-volcanizing (RTV) material via a solder resist dam is presented herein. A sensor package comprises: a first semiconductor die; a second semiconductor die that is attached to the first semiconductor die to form a monolithic die; and a substrate comprising a top portion and a bottom portion, in which the top portion comprises a plurality of solder resist dams, the monolithic die is attached to the top portion of the substrate via the RTV material being disposed in a defined area of the top portion of the substrate, and the bottom portion of the substrate comprises electrical terminals that facilitate attachment and electrical coupling of signals of the sensor package to a printed circuit board.
SEMICONDUCTOR PACKAGE
A semiconductor package includes a circuit board including a wiring structure, first and second semiconductor chips disposed on the circuit board and connected to the wiring structure, a dummy chip disposed on the circuit board and positioned between the first and second semiconductor chips, and a molded member disposed on the circuit board and surrounding the first and second semiconductor chips and the dummy chip. The dummy chip may include a rounded edge between an upper surface and a side surface.
Light emitting device including RGB light emitting diodes and phosphor
A light emitting device including a plurality light emitting diodes configured to produce a primary light; a wavelength conversion means configured to at least partially convert the primary light into secondary light having peak emission wavelength ranges between 450 nm and 520 nm, between 500 nm and 570 nm, and between 570 nm and 680 nm; and a molded part to enclose the light emitting diodes and the wavelength conversion means.
METHOD FOR MANUFACTURING A FUNCTIONAL CHIP SUITABLE FOR BEING ASSEMBLED TO WIRE ELEMENTS
The invention relates to a functional chip (100) of which at least two electrical connection pads (11a, 11b) are intended for being connected to wire elements (40a, 40b). Said chip comprises: —a substrate (10) comprising a microelectronic component electrically connected to the two electrical connection pads arranged on a front face of said substrate (10), —a cover (20) comprising a first portion (21) assembled to the front face of the substrate (10), said first portion (21) forming a spacer between the two electrical connection pads; the cover (20) further comprising a second portion (22) spaced apart from the front face of the substrate (10) and extending opposite each electrical connection pad only partially, so as to allow access to said pads, along an axis (z) normal to the front face of the substrate (10). The invention likewise relates to a method for manufacturing such a functional chip.
Multi-die package with bridge layer
A device is provided. The device includes a bridge layer over a first substrate. A first connector electrically connecting the bridge layer to the first substrate. A first die is coupled to the bridge layer and the first substrate, and a second die is coupled to the bridge layer.
SEMICONDUCTOR PACKAGE AND SUBSTRATE FOR SEMICONDUCTOR PACKAGE
A semiconductor package is provided. A semiconductor package includes a semiconductor package comprising a connecting structure in which a connecting terminal is placed in a lower part, and a semiconductor chip which is placed on the connecting structure and connected to the connecting structure, wherein the connecting structure includes a plurality of wiring layers placed to be stacked, a plurality of insulating layers between the wiring layers, and first and second passivation layers which each covers at least a part of an uppermost layer of the plurality of insulating layers and the wiring layer placed on the uppermost layer, and a through vias which penetrates the plurality of insulating layers, wherein the through via comes into contact with a lower surface of the first passivation layer and an upper surface of the second passivation layer.