A semiconductor device includes first and second semiconductor elements, and first and second circuits at different potentials. The second semiconductor element, electrically connected to the first semiconductor element, relays mutual signals between the first and the second circuits, while insulating them. The semiconductor device further includes a first terminal lead electrically connected to the first semiconductor element, a first wire connected to the first and the second semiconductor elements, and a second wire connected to the first semiconductor element and the first terminal lead. The first wire contains a first metal. The second wire includes a first core containing a second metal, and a first surface layer containing a third metal and covering the first core. The second metal has a smaller atomic number than that of the first metal. The third metal has a greater bonding strength with respect to the first terminal lead than the second metal.

A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.

The present disclosure relates to segmented shielding using wirebonds. In an exemplary aspect, a shield is formed from a series of wires (e.g., wirebonds) to create a wall and/or shielded compartment in an integrated circuit (IC) module. The wires can be located in any area within the IC module. The IC module may be overmolded with an insulating mold compound, and a top surface of the insulating mold can be ground or otherwise removed to expose ends of the wires to a shield layer which surrounds the insulating mold. Some examples may further laser ablate or otherwise form cavities around the ends of the wires to create stronger bonding between the wires of the shield and the shield layer.

Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Provided are a sensor package and a sensor package module. The sensor package includes: a substrate including a sensing area; a terminal portion disposed on a side of the sensing area of the substrate and including at least one terminal connected to the outside; a first outer wall disposed on the substrate and including a main wall surrounding at least some outer portions of the sensing area; at least one wire patterned and disposed on the substrate and configured to connect the sensing area and the terminal portion to each other; and a cover disposed on the first outer wall to correspond to the sensing area. Part of the main wall is disposed between the sensing area and the terminal portion, and the main wall includes an opening through which the at least one wire passes.

A method includes attaching a first portion of a preformed metal micro-wire to a multilayer structure. The preformed metal micro-wire has a diameter of 10 microns or less. The method also includes attaching a second portion of the preformed metal micro-wire to the multilayer structure.

A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.

Stacked microfeature devices and associated methods of manufacture are disclosed. A package in accordance with one embodiment includes first and second microfeature devices having corresponding first and second bond pad surfaces that face toward each other. First bond pads can be positioned at least proximate to the first bond pad surface and second bond pads can be positioned at least proximate to the second bond pad surface. A package connection site can provide electrical communication between the first microfeature device and components external to the package. A wirebond can be coupled between at least one of the first bond pads and the package connection site, and an electrically conductive link can be coupled between the first microfeature device and at least one of the second bond pads of the second microfeature device. Accordingly, the first microfeature device can form a portion of an electrical link to the second microfeature device.

A method includes attaching a micro-coaxial wire to electrical contacts in a substrate, the micro-coaxial wire including a core wire, a bonded section, and a shield layer, the electrical contacts including a first electrical contact and a second electrical contact. Attaching the micro-coaxial wire to the electrical contacts includes connecting a core wire of the micro-coaxial wire to the first electrical contact including forming a bonded section by bonding the core wire to the first electrical contact, and then depositing solder onto the bonded section of the core wire.

A method for producing a semiconductor component is proposed. The method includes providing a housing. At least one semiconductor chip is arranged in a cavity of the housing. Furthermore, an electrical contact of the semiconductor chip is connected to an electrical contact of the housing via a bond wire. The method furthermore includes applying a protective material on the electrical contact of the semiconductor chip and also on a region of the bond wire which is adjacent to the electrical contact of the semiconductor chip, and/or on the electrical contact of the housing and also on a region of the bond wire which is adjacent to the electrical contact of the housing. Moreover, the method also includes filling at least one partial region of the cavity with a gel.