A printed electrical connection structure includes a substrate having one or more electrical connection pads and a micro-transfer printed component having one or more connection posts. Each connection post is in electrical contact with a connection pad. A resin is disposed between and in contact with the substrate and the component. The resin has a reflow temperature less than a cure temperature. The resin repeatedly flows at the reflow temperature when temperature-cycled between an operating temperature and the reflow temperature but does not flow after the resin is exposed to a cure temperature. A solder can be disposed on the connection post or the connection pad. After printing and reflow, the component can be tested and, if the component fails, another component is micro-transfer printed to the substrate, the resin is reflowed again, the other component is tested and, if it passes the test, the resin is finally cured.

A device includes a chip assembled on an interposer. An electrically-insulating layer coats an upper surface of the interposer around the chip. First metal lines run on the upper surface of the interposer and are arranged between conductive elements of connection to the chip. An end of each first metal line is arranged to extend beyond a projection of the chip on the interposer. A thermally-conductive via connects the end of the first metal line to a heat sink supported at an upper surface of the device.

A device includes a chip assembled on an interposer. An electrically-insulating layer coats an upper surface of the interposer around the chip. First metal lines run on the upper surface of the interposer and are arranged between conductive elements of connection to the chip. An end of each first metal line is arranged to extend beyond a projection of the chip on the interposer. A thermally-conductive via connects the end of the first metal line to a heat sink supported at an upper surface of the device.

A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.

A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.

A method for manufacturing a semiconductor apparatus, including preparing a first substrate provided with a pad optionally having a plug and a second substrate or device provided with a plug, forming a solder ball on at least one of the pad or plug of first substrate and the plug of second substrate or device, covering at least one of a pad-forming surface of first substrate and a plug-forming surface of second substrate or device with a photosensitive insulating layer, forming an opening on the pad or plug of the substrate or device that has been covered with photosensitive insulating layer by lithography, pressure-bonding the second substrate or device's plug to the pad or plug of first substrate with the solder ball through the opening, electrically connecting pad or plug of first substrate to second substrate or device's plug by baking, and curing photosensitive insulating layer by baking.

A method for manufacturing a semiconductor apparatus, including preparing a first substrate provided with a pad optionally having a plug and a second substrate or device provided with a plug, forming a solder ball on at least one of the pad or plug of first substrate and the plug of second substrate or device, covering at least one of a pad-forming surface of first substrate and a plug-forming surface of second substrate or device with a photosensitive insulating layer, forming an opening on the pad or plug of the substrate or device that has been covered with photosensitive insulating layer by lithography, pressure-bonding the second substrate or device's plug to the pad or plug of first substrate with the solder ball through the opening, electrically connecting pad or plug of first substrate to second substrate or device's plug by baking, and curing photosensitive insulating layer by baking.

The present invention aims to provide a method for producing a semiconductor device, the method being capable of achieving high reliability by suppressing voids. The present invention also aims to provide a flip-chip mounting adhesive for use in the method for producing a semiconductor device. The present invention relates to a method for producing a semiconductor device, including: step 1 of positioning a semiconductor chip on a substrate via an adhesive, the semiconductor chip including bump electrodes each having an end made of solder; step 2 of heating the semiconductor chip at a temperature of the melting point of the solder or higher to solder and bond the bump electrodes of the semiconductor chip to an electrode portion of the substrate, and concurrently to temporarily attach the adhesive; and step 3 of removing voids by heating the adhesive under a pressurized atmosphere, wherein the adhesive has an activation energy ΔE of 100 kJ/mol or less, a reaction rate of 20% or less at 2 seconds at 260° C., and a reaction rate of 40% or less at 4 seconds at 260° C., as determined by differential scanning calorimetry and Ozawa method.

A device (2) is formed on a main surface of a substrate (1). The main surface of the substrate (1) is bonded to the undersurface of the counter substrate (14) via the bonding member (11,12,13) in a hollow state. A circuit (17) and a bump structure (26) are formed on the top surface of the counter substrate (14). The bump structure (26) is positioned in a region corresponding to at least the bonding member (11,12,13), and has a higher height than that of the circuit (17).

A device (2) is formed on a main surface of a substrate (1). The main surface of the substrate (1) is bonded to the undersurface of the counter substrate (14) via the bonding member (11,12,13) in a hollow state. A circuit (17) and a bump structure (26) are formed on the top surface of the counter substrate (14). The bump structure (26) is positioned in a region corresponding to at least the bonding member (11,12,13), and has a higher height than that of the circuit (17).