Patent classifications
H01L2224/95085
Counterbore Pocket Structure for Fluidic Assembly
A fluidic assembly method is provided that uses a counterbore pocket structure. The method is based upon the use of a substrate with a plurality of counterbore pocket structures formed in the top surface, with each counterbore pocket structure having a through-hole to the substrate bottom surface. The method flows an ink with a plurality of objects over the substrate top surface. As noted above, the objects may be micro-objects in the shape of a disk. For example, the substrate may be a transparent substrate and the disks may be light emitting diode (LED) disks. Simultaneously, a suction pressure is created at the substrate bottom surface. In response to the suction pressure from the through-holes, the objects are drawn into the counterbore pocket structures. Also provided is a related fluidic substrate assembly.
PRINTING COMPLEX ELECTRONIC CIRCUITS USING A PRINTABLE SOLUTION DEFINED BY A PATTERNED HYDROPHOBIC LAYER
A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
Roll-to-roll fabricated light sheet and encapsulated semiconductor device
A bottom electrically conductive surface is disposed on the top surface of a substrate and a top electrically conductive surface disposed on the bottom surface of a superstrate. A bare die electronic device is disposed with at least one of its top conductor in direct electrical communication with the bottom electrically conductive surface and/or its bottom conductor in direct electrical communication with the top conductive surface. A non-conductive adhesive secures the substrate to the superstrate so that the bare die electronic device is retained in direct electrical communication. The non-conductive adhesive has a melting point temperature at least greater than a minimum operating temperature of the operating temperature range of the bare die, so that the non-conductive adhesive does not melt and flow thereby preventing a separation or degradation of the direct electrical connection of the bare die electronic device.
Solvent for manufacture of self-assembled nano-scale LED electrode assembly and method for manufacturing self-assembled nano-scale LED electrode assembly by the same
The present disclosure relates to a method for manufacturing a self-assembled nano-scale LED electrode assembly and more particularly, to a method for manufacturing a self-assembled nano-scale LED electrode assembly in which a nano-scale LED device can be self-aligned on two different electrodes without being chemically and physically damaged and the number of nano-scale LED devices to be mounted can be remarkably increased, and alignment and electrical connection of the LED devices can be further improved.
Substrate Features for Enhanced Fluidic Assembly of Electronic Devices
Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for assuring deposition of elements in relation to a substrate.
Fluidic Self Assembly of Contact Materials
Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for forming contacts during fluidic assembly.
Fluidic Assembly Using Tunable Suspension Flow
Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for increasing the efficiency of fluidic assembly.
Substrate features for enhanced fluidic assembly of electronic devices
Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for assuring deposition of elements in relation to a substrate. In some cases, embodiments include a substrate including a plurality of wells each having a sidewall where a through hole via extends from a bottom of at least one of the plurality of wells; and a post enhanced diode including a post extending from a top surface of a diode structure.
Display apparatus and method of manufacturing the same
A method of manufacturing a display apparatus includes separating a light-emitting diode (LED) chip from a base substrate; disposing the separated light-emitting diode chip in a solution; disposing a substrate including a first electrode thereon, in the solution; with the separated light-emitting diode chip and the substrate including the first electrode thereon in the solution, applying a negative voltage to the substrate to attract the separated light-emitting diode chip to the first electrode on the substrate; mounting the light-emitting diode chip attracted to the first electrode, on the first electrode; and removing the substrate with the light-emitting diode chip mounted on the first electrode from the solution and drying the removed substrate, to form the display apparatus.
Printing complex electronic circuits using a patterned hydrophobic layer
A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.