Light emitting devices and methods for their manufacture are provided. According to one aspect, a light emitting device is provided that comprises a substrate having a recess, and an interlayer dielectric layer located on the substrate. The interlayer dielectric layer may have a first hole and a second hole, the first hole opening over the recess of the substrate. The light emitting device may further include first and second micro LEDs, the first micro LED having a thickness greater than the second micro LED. The first micro LED and the second micro LED may be placed in the first hole and the second hole, respectively.

Light emitting devices and methods for their manufacture are provided. According to one aspect, a light emitting device is provided that comprises a substrate having a recess, and an interlayer dielectric layer located on the substrate. The interlayer dielectric layer may have a first hole and a second hole, the first hole opening over the recess of the substrate. The light emitting device may further include first and second micro LEDs, the first micro LED having a thickness greater than the second micro LED. The first micro LED and the second micro LED may be placed in the first hole and the second hole, respectively.

Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.

The present disclosure relates to a method for manufacturing a self-assembled nano-scale LED electrode assembly and more particularly, to a method for manufacturing a self-assembled nano-scale LED electrode assembly in which a nano-scale LED device can be self-aligned on two different electrodes without being chemically and physically damaged and the number of nano-scale LED devices to be mounted can be remarkably increased, and alignment and electrical connection of the LED devices can be further improved.

A hybrid light emitting diode (LED) display and fabrication method are provided. The method forms a stack of thin-film layers overlying a top surface of a substrate. The stack includes an LED control matrix and a plurality of pixels. Each pixel is made up of a first subpixel enabled using an inorganic micro LED (uLED), a second subpixel enabled using an organic LED (OLED), and a third subpixel enabled using an OLED. The first subpixel emits a blue color light, the second subpixel emits a red color light, and the third subpixel emits a green color light. In one aspect, the stack includes a plurality of wells in a top surface of the stack, populated by the LEDs. The uLEDs may be configured vertical structures with top and bottom electrical contacts, or surface mount top surface contacts. The uLEDs may also include posts for fluidic assembly orientation.

A display device can include a substrate, a first assembling wiring on the substrate, a second assembling wiring on the substrate, a partition wall disposed on the first and second assembling wirings and having a hole, a semiconductor light-emitting device disposed in the hole and having a first step difference part on a side portion thereof, and a connection electrode disposed on at least the first step difference part.

A wet alignment method for a micro-semiconductor chip and a display transfer structure are provided. The wet alignment method for a micro-semiconductor chip includes: supplying a liquid to a transfer substrate including a plurality of grooves; supplying the micro-semiconductor chip onto the transfer substrate; scanning the transfer substrate by using an absorber capable of absorbing the liquid. According to the wet alignment method, the micro-semiconductor chip may be transferred onto a large area.

A light source module includes a circuit board having a plurality of chip mounting regions, the plurality of chip mounting regions respectively having at least one connection pad; at least one alignment component respectively disposed on the plurality of chip mounting regions, and having a convex or concave shape; and a plurality of LED chips respectively mounted on the plurality of chip mounting regions, respectively having at least one electrode electrically connected to the at least one connection pad, and respectively coupled to the at least one alignment component.

Fluidic assembly methods are presented for the fabrication of emissive displays. An emissive substrate is provided with a top surface, and a first plurality of wells formed in the top surface. Each well has a bottom surface with a first electrical interface. Also provided is a liquid suspension of emissive elements. The suspension is flowed across the emissive substrate and the emissive elements are captured in the wells. As a result of annealing the emissive substrate, electrical connections are made between each emissive element to the first electrical interface of a corresponding well. A eutectic solder interface metal on either the substrate or the emissive element is desirable as well as the use of a fluxing agent prior to thermal anneal. The emissive element may be a surface mount light emitting diode (SMLED) with two electrical contacts on its top surface (adjacent to the bottom surfaces of the wells).

A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.