H01L2224/95148

MODULE STRUCTURES WITH COMPONENT ON SUBSTRATE POST

A module structure comprises a patterned substrate having a substrate surface and comprising a substrate post protruding from the substrate surface. A component is disposed on the substrate post. The component has a component top side and a component bottom side opposite the component top side. The component bottom side is disposed on the substrate post. The component extends over at least one edge of the substrate post. One or more component electrodes are disposed on the component.

High Speed Handling of Ultra-Small Chips by Selective Laser Bonding and Debonding

Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 m to about 100 m, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

Device and method of fluidic assembly of microchips on a substrate

A cell of fluidic assembly of microchips on a substrate, including: a base having its upper surface intended to receive the substrate; a body laterally delimiting a fluidic chamber above the substrate; and a cover closing the fluidic chamber from its upper surface, wherein the body comprises first and second nozzles respectively emerging onto opposite first and second lateral edges of the fluidic chamber, each of the first and second nozzles being adapted to injecting and/or sucking in a liquid suspension of microchips into and/or from the fluidic chamber, in a direction parallel to the mean plane of the substrate.

High speed handling of ultra-small chips by selective laser bonding and debonding

Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 m to about 100 m, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

High Speed Handling of Ultra-Small Chips by Selective Laser Bonding and Debonding

Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 m to about 100 m, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

RESOURCE MANAGEMENT WITH TIME AND EXPENSE TRACKING
20240128115 · 2024-04-18 · ·

Method and system that operates on a server include a time and expense management interface for capturing time and expense reporting. The time and expense reporting is for utility distribution systems, such as electrical power distribution and/or transmission systems, cellular, telecommunications, cable TV, water and sewer, natural gas, and others. These utility distribution systems include a large number of devices or objects that are distributed across a big geographic area. In one example, the authorization to submit the invoice for portions of the mobilization work order that have completed the approval process includes only authorization to submit the invoice for those portions of the mobilization work order i) not already paid or ii) that have been previously submitted and completed the approval process. The invention helps to document time and expense for government agencies, such as public utility commissions. This documentation maybe used with setting special charges on customer invoices.

METHOD FOR PANEL-LEVEL THERMO-COMPRESSION BONDING
20240186281 · 2024-06-06 ·

The present disclosure is directed to a thermocompression bonding tool having a bond head with a surface for compression and heating and a sensor, a stage for compression and heating, and a controller, and a method for its use for chip gap height and alignment control. For chip gap height and alignment control, the controller is provided with a recipe displacement and temperature profile and measured offsets.

Display device using semiconductor light emitting device and method for manufacturing the same

Discussed is a display device, including a substrate having an assembly region and a non-assembly region, semiconductor light emitting devices arranged on the substrate, a first wiring electrode and a second wiring electrode extended from each of the semiconductor light emitting devices, respectively, to supply an electric signal to the semiconductor light emitting devices, pair electrodes arranged on the substrate to generate an electric field when an electric current is supplied, and provided with first and second pair electrodes disposed on an opposite side to the first and second wiring electrodes with respect to the semiconductor light emitting devices, a dielectric layer disposed on the pair electrodes, and bus electrodes electrically connected to the pair electrodes, wherein the pair electrodes are arranged in parallel to each other along a direction in the assembly region, and wherein the bus electrodes are disposed in the non-assembly region.

Offset alignment and repair in micro device transfer
12482686 · 2025-11-25 · ·

This invention relates to the process of correcting misalignment and filling voids after a microdevice transfer process. The process involves transfer heads, measurement of offset and misalignment in horizontal, vertical, and rotational errors. An execution of the new offset vector for the next transfer corrects the alignment.