H01L2924/10157

Method for packaging a chip
11177141 · 2021-11-16 · ·

A method for packaging a chip and a chip package structure are provided. The method is used to package the chip including an acoustic filter. The packaging substrate and the device wafer are welded together, wherein the edge of the device wafer is chamfered, the packaging substrate is provided with a groove, the chamfered portion of device wafer is aligned with the groove on the substrate, and then a mask is disposed. The surface of the mask facing the device wafer is an inclined surface, forming a wedge-shaped opening. A package resin material is printed, wherein the package resin material falls into the groove through the inclined surface of the mask, and a package resin film is formed between the groove and the chamfer. The mask is removed along the first surface toward the second surface. The package resin is cured in a position where the resin film is located.

Semiconductor package including nonconductive film having controlled tail portion
11217540 · 2022-01-04 · ·

A semiconductor package according to an aspect includes a package substrate, a first semiconductor chip disposed on the package substrate and including a first through electrode, a second semiconductor chip stacked on the first semiconductor chip and having a second through electrode, and a nonconductive film disposed in a bonding zone between the first semiconductor chip and the second semiconductor chip. At an edge portion of the bonding zone, an edge portion of the first semiconductor chip is recessed in the lateral direction, based on an edge portion of the second semiconductor chip.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
20230130044 · 2023-04-27 · ·

A method for manufacturing a semiconductor device is provided, including: preparing a first chip forming portion having a first semiconductor substrate, first metal pads provided at the substrate and a first circuit electrically connected to at least a part of the pads, and a second chip forming portion having a second semiconductor substrate, second metal pads provided at substrate and a second circuit electrically connected to at least a part of the pads; bonding the first and the second chip forming portions while joining the first and the second pads to form a bonding substrate having a non-bonded region between the first and the second chip forming portions at an outer peripheral portion thereof; and filling an insulating film into the non-bonded region, at least a part of the insulating film containing at least one selected from the group consisting of silicon nitride and nitrogen-containing silicon carbide.

Semiconductor device and method for manufacturing the same
11621239 · 2023-04-04 · ·

A semiconductor device according to an embodiment includes: a bonding substrate which includes a first chip forming portion having first metal pads provided at a semiconductor substrate and a first circuit connected to the first metal pads, and a second chip forming portion having second metal pads joined to the first metal pads and a second circuit connected to the second metal pads and being bonded to the first chip forming portion; and an insulating film which is filled into a non-bonded region between the first chip forming portion and the second chip forming portion at an outer peripheral portion of the bonding substrate. At least a part of the insulating film contains at least one selected from the group consisting of silicon nitride and nitrogen-containing silicon carbide.

Method for producing semiconductor device, semiconductor package, and method for producing semiconductor package
11621193 · 2023-04-04 · ·

A method for producing a semiconductor device includes dicing, at a scribe area of a semiconductor wafer, the semiconductor wafer into semiconductor chips including respective circuit areas formed on the semiconductor wafer, the scribe area being provided between the circuit areas and extending in a first direction in a plan view, wherein the scribe area includes a first area extending in the first direction and second areas including monitor pads and extending in the first direction and located on both sides of the first area, wherein the method includes removing at least portions of the monitor pads by emitting laser beam to the second areas before the dicing, and wherein, in the dicing, the semiconductor wafer is diced at the first area.

Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages

A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

DIFFUSION BARRIER COLLAR FOR INTERCONNECTS
20230360968 · 2023-11-09 ·

Representative implementations of techniques and devices are used to reduce or prevent conductive material diffusion into insulating or dielectric material of bonded substrates. Misaligned conductive structures can come into direct contact with a dielectric portion of the substrates due to overlap, especially while employing direct bonding techniques. A barrier interface that can inhibit the diffusion is disposed generally between the conductive material and the dielectric at the overlap.

HYBRID DEVICE ASSEMBLIES AND METHOD OF FABRICATION
20230369272 · 2023-11-16 ·

A device assembly includes a functional substrate having one or more electronic components formed there. The functional substrate has a cavity extending from a first surface toward a second surface of the functional substrate at a location that lacks the electronic components. The device assembly further includes a semiconductor die placed within the cavity with a pad surface of the semiconductor die being opposite to a bottom of the cavity. The functional substrate may be formed utilizing a first fabrication technology and the semiconductor die may be formed utilizing a second fabrication technology that differs from the first fabrication technology.

Semiconductor device and method of forming protective layer around cavity of semiconductor die

A semiconductor device has a semiconductor die with a sensor and a cavity formed into a first surface of the semiconductor die to provide access to the sensor. A protective layer is formed on the first surface of the semiconductor die around the cavity. An encapsulant is deposited around the semiconductor die. The protective layer blocks the encapsulant from entering the cavity. With the cavity clear of encapsulant, liquid or gas has unobstructed entry into cavity during operation of the semiconductor die. The clear entry for the cavity provides reliable sensor detection and measurement. The semiconductor die is disposed over a leadframe. The semiconductor die has a sensor. The protective layer can be a film. The protective layer can have a beveled surface. A surface of the leadframe can be exposed from the encapsulant. A second surface of the semiconductor die can be exposed from the encapsulant.

Package structure and method of forming the same

A package structure and method of forming the same are provided. The package structure includes a semiconductor unit, a package component and an underfill layer. The semiconductor structure unit includes a first semiconductor structure and a second semiconductor structure disposed as side by side, and an isolation region laterally between the first semiconductor structure and the second semiconductor structure. The isolation region vertically extends from a top surface to a bottom surface of the semiconductor structure unit. The semiconductor structure unit is disposed on and electrically connected to the package component. The underfill layer is disposed to fill a space between the semiconductor structure unit and the package component.