RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

A semiconductor device, including a capacitor, a semiconductor module having a first power terminal formed on a front surface of a first insulating member, and a connecting member electrically connecting and mechanically coupling the semiconductor module and the capacitor to each other, the connecting member having a front surface and a rear surface opposite to each other, the rear surface being on a front surface of the first power terminal. The connecting member is bonded to the semiconductor module via a first welded portion, which penetrates the front and rear surfaces of the connecting member, and penetrates the front surface of the first power terminal, in a thickness direction of the semiconductor device, a distance in the thickness direction between a bottommost portion of first welded portion and the front surface of the first insulating member being 0.3 mm or more.

A packaged radio frequency transistor amplifier includes a package housing, an RF transistor amplifier die that is mounted within the package housing, a first capacitor die that is mounted within the package housing, an input leadframe that extends through the package housing to electrically connect to a gate terminal of the RF transistor amplifier die, and an output leadframe that extends through the package housing to electrically connect to a drain terminal of the RF transistor amplifier die. The output leadframe includes an output pad region, an output lead that extends outside of the package housing, and a first arm that extends from one of the output pad region and the output lead to be adjacent the first capacitor die.

A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.

A method for manufacturing a semiconductor structures is provided. The method includes forming a first hybrid bonding layer over a first wafer having a logic structure, forming a second hybrid bonding layer over a second wafer having a first capacitor structure, bonding the first wafer and the second wafer through a hybrid bonding operation to connect the first hybrid bonding layer and the second hybrid bonding layer, thereby obtaining a first bonded wafer, and the first capacitor structure is electrically connected to the logic structure through the first hybrid bonding layer and the second hybrid bonding layer, and singulating the first bonded wafer to obtain a plurality of semiconductor structures.

Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a plurality of support members also attached to the package substrate. The plurality of support members can include a first support member and a second support member disposed at opposite sides of the first semiconductor die, and a second semiconductor die can be coupled to the support members such that at least a portion of the second semiconductor die is over the first semiconductor die.

Stacked semiconductor die assemblies with die support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a support member attached to the package substrate. The support member can be separated from the first semiconductor die, and a second semiconductor die can have one region coupled to the support member and another region coupled to the first semiconductor die.

A display substrate including a base substrate, a first thin film transistor disposed on the base substrate and including a first gate electrode and a first semiconductor active layer; a second thin film transistor electrically connected to the first thin film transistor, the second thin film transistor including a second gate electrode and a second semiconductor active layer; and an organic light emitting device electrically connected to the second thin film transistor. The first semiconductor active layer includes a first material and the second semiconductor active layer includes a second material different from the first material.

A method for fabricating an electronic package is provided. A plurality of packaging structures are provided, each of which having a carrier and at least one electronic component disposed on the carrier. The plurality of packaging structures are disposed on a supporting plate. An encapsulation layer is formed on the supporting plate and encapsulates the plurality of packaging structures. Even if there are various types of electronic packages of different specifications in the market, the molds that the encapsulation layer uses can still be developed for a supporting plate of a certain specification. Therefore, the fabrication cost of the electronic package is reduced.

A package includes a first package and a second package over and bonded to the first package. The first package includes a first device die, and a first encapsulant encapsulating the first device die therein. The second package includes an Independent Passive Device (IPD) die, and a second encapsulant encapsulating the IPD die therein. The package further includes a power module over and bonded to the second package.