A device includes a first die including a pseudo-random binary sequence (PRBS) generator that outputs test signals on parallel lanes. The device further includes a second die comprising a PRBS checker that compares at least a portion of the test signals with reference signals to identify a particular lane associated with an error.

A semiconductor device structure and a method for making a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for making thereof, that comprise a thin fine-pitch redistribution structure.

A semiconductor package may be provided. The semiconductor package may include a first semiconductor chip and a second semiconductor chip disposed on an interconnection layer. The semiconductor package may include a heat transferring block disposed between the first and second semiconductor chips to be mounted on the interconnection layer. Related methods are also provided.

Disclosed are devices and methods related to a conductive paint layer configured to provide radio-frequency (RF) shielding for a packaged semiconductor module. Such a module can include a packaging substrate, one or more RF components mounted on the packaging substrate, a ground plane disposed within the packaging substrate, and a plurality of RF-shielding wirebonds disposed on the packaging substrate and electrically connected to the ground plane. The module can further include an overmold structure formed over the packaging substrate and dimensioned to substantially encapsulate the RF component(s) and the RF-shielding wirebonds. The overmold structure can define an upper surface that exposes upper portions of the RF-shielding wirebonds. The module can further include a conductive paint layer having silver flakes disposed on the upper surface of the overmold structure so that the conductive paint layer, the RF-shielding wirebonds, and the ground plane form an RF-shield for the RF component(s).

A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.

Aspects of the present disclosure relate to determining a layout of a racetrack that forms part of an RF isolation structure of a packaged module and the resulting RF isolation structures. Locations of where the racetrack can be adjusted (for example, narrowed) and/or removed without significantly degrading the EMI performance of the RF isolation structure can be identified. In certain embodiments, a portion of the racetrack can be removed to create a break and/or a portion of the racetrack can be narrowed in a selected area.

A method of making an interconnect substrate mainly includes steps of: providing metal posts around a stress modulator, providing a molding compound to bind the stress modulator and the metal posts, providing a crack inhibiting layer on the stress modulator and the molding compound and interfaces between the stress modulator and the molding compound, and depositing metal conductors on the crack inhibiting layer and electrically connected to the metal posts. The metal conductors have interconnect pads superimposed over the stress modulator so that bumps for device connection can be mounted at the area covered by the stress modulator, thereby avoiding cracking of the bumps.

A wireless IC device includes a resin member including first and second surfaces, a substrate including first and second principal surfaces, a coil antenna provided in the resin member, and an RFIC element mounted on the substrate and connected to the coil antenna. The substrate is embedded in the resin member so that the second principal surface is at a second surface side. The coil antenna is defined by first linear conductor patterns on the second surface, first metal posts extending between the first and second surfaces, second metal posts extending between the first and second surfaces, and second linear conductor patterns on the first surface. The RFIC element is disposed in the coil antenna.

A micro-transfer printable electronic component includes one or more electronic components, such as integrated circuits or LEDs. Each electronic component has device electrical contacts for providing electrical power to the electronic component and a post side. A plurality of electrical conductors includes at least one electrical conductor electrically connected to each of the device electrical contacts. One or more electrically conductive connection posts protrude beyond the post side. Each connection post is electrically connected to at least one of the electrical conductors. Additional connection posts can form electrical jumpers that electrically connect electrical conductors on a destination substrate to which the printable electronic component is micro-transfer printed. The printable electronic component can be a full-color pixel in a display.

Aspects of the present disclosure relate to determining a layout of a racetrack that forms part of a radio frequency (RF) isolation structure of a packaged module and forming the resulting RF isolation structures. Based on electromagnetic interference data for a module, an area of the module that is less sensitive to external radiation is identified. A racetrack layout can be determined based on identifying the area that is less sensitive to external radiation. The racetrack layout can include a narrowed section in the area that is less sensitive to external radiation or a break in the area that is less sensitive to external radiation.