A semiconductor package includes an interposer; a first stacked chip including a first semiconductor chip disposed on the interposer and one or more second semiconductor chips disposed on the first semiconductor chip; a first molding layer surrounding the first stacked chip; and a second molding layer surrounding the first molding layer, wherein the second molding layer extends from an uppermost surface of the interposer to a trench of the interposer.

A ceramic encapsulating casing and a mounting structure thereof are provided. The ceramic encapsulating casing includes a ceramic substrate, a ceramic insulator, a cover plate and a pad structure. The ceramic substrate is provided with a cavity with an upward opening. The ceramic insulator is disposed on the ceramic substrate and provided with a radio frequency transmission structure. The pad structure is arranged on a bottom surface of the ceramic substrate. and includes a plurality of second pads that are arranged for transmitting signals and arranged in an array manner. A plurality of solder balls are attached to the plurality of second pads in one-to-one correspondence.

A high-frequency package includes a radio wave shielding portion that shields radio waves radiated from a high-frequency component, a radio wave absorber that is arranged facing the high-frequency component and that absorbs the radio waves, and an adjusting means that enables adjustment of distance from the radio wave absorber to the high-frequency component by adjusting a position of the radio wave absorber with respect to the radio wave shielding portion.

An interposer structure includes: an interposer substrate; an interposer through electrode penetrating through the interposer substrate in a vertical direction; a redistribution structure on the interposer substrate and including a redistribution pattern connected to the interposer through electrode and a redistribution insulating layer on side surfaces of the redistribution pattern on the interposer substrate; a conductive post on the redistribution structure and connected to the redistribution pattern; and an interposer insulating layer on side surfaces of the conductive post on the redistribution structure.

Electronic assemblies and methods of assembly are described. In an embodiment, an electronic assembly includes a stiffener structure shear bonded to an opposite side of a module substrate from a ball grid array (BGA) package. The stiffener structure may be shear bonded at elevated temperature after bonding of the BGA package to lock in a flat or near-flat surface contour of the module substrate.

A method of manufacturing an electronic package is provided, in which a package module including a routing structure is stacked on a carrier structure via a plurality of conductive elements, a heat dissipation member covers a part of a surface of the routing structure, and an electronic module is disposed on another part of the surface of the routing structure, so that the routing structure is formed with at least one heat dissipation pad bonded to the heat dissipation member, such that the heat energy of the electronic module and the package module can be dissipated via the heat dissipation pad and the heat dissipation member.

A power semiconductor module includes: a substrate with a metallization layer attached to a dielectric insulation layer and a semiconductor body mounted to the metallization layer; a housing at least partly enclosing the substrate and having sidewalls and a cover that at least partly covers an opening formed by the sidewalls and has a flexible portion; and a press-on pin having arranged on the substrate or semiconductor body. A first end of the press-on pin faces the substrate or semiconductor body and extends towards the cover such that a second end of the press-on pin contacts the flexible portion of the cover. The substrate in an area vertically below the press-on pin has a first spring constant k.sub.1 in a vertical direction that is perpendicular to a top surface of the substrate. The flexible portion of the cover has a second spring constant k.sub.2, where 0.5*k.sub.1≤k.sub.2≤5*k.sub.1.

A semiconductor package includes a module substrate having opposite top and bottom surfaces, a semiconductor chip provided with bumps and mounted on the top surface of the module substrate via the bumps, and a metal member having a top portion disposed at a level higher than the semiconductor chip with reference to the top surface of the module substrate and including the semiconductor chip in plan view and a side portion extending from the top portion toward the module substrate. The module substrate includes a first metal film disposed on or in at least one of the bottom surface and an internal layer of the module substrate. The first metal film is electrically connected to the bumps and reaches a side surface of the module substrate. The side portion is thermally coupled to the first metal film at the side surface of the module substrate.

Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.

An integrated device package is disclosed. The package can include a package substrate comprising a composite die pad having an upper surface and a lower surface spaced from the upper surface along a vertical direction. The composite die pad can include an insulator die pad and a metal die pad. The insulator die pad and the metal die pad can be disposed adjacent one another along the vertical direction. The substrate can include a plurality of leads disposed about at least a portion of a perimeter of the composite die pad. An integrated device die can be mounted on the upper surface of the composite die pad.