A semiconductor package including a semiconductor die and at least one bondline positioned on the semiconductor die, the at least one bondline comprising a nickel lanthanide alloy diffusion barrier layer abutting a gold layer.

Multiple chip module (MCM) structures are described. In an embodiment, a module includes a first and second components on the top side of a module substrate, a stiffener structure mounted on the top side of the module substrate, and a lid mounted on the stiffener structure and covering the first component and the second component. The stiffener is joined to the lid within a trench formed in a roof of the lid.

A hollow type semiconductor device has a pre-molded substrate (15) in which an element mounting portion, top surfaces of inner leads (2), and a top surface of frame-shaped wiring (7) are exposed on a first surface of a resin sealing body (6), and back surfaces of outer leads (3) and a back surface of a first frame-shaped wall (8) are exposed on a back surface of the resin sealing body (6). A hollow sealing body (14) including a second frame-shaped wall (9) and a sealing plate (4) is provided on the pre-molded substrate (15). The second frame-shaped wall (9) and the sealing plate (4) enclose a hollow portion (13) in which a semiconductor element (1) is kept.

To prevent damage of a semiconductor package by deformation of members forming the semiconductor package in accordance with a change in temperature. A semiconductor device is provided with a frame, a semiconductor chip, and a lid. The frame includes a bottom and a wall arranged so as to be adjacent to the bottom and formed into an annular shape, the wall provided with a protrusion continuous in a circumferential direction of the annular shape on an upper surface. The semiconductor chip is placed on the bottom surrounded by the wall. The lid is adhered to the frame at an upper surface.

A semiconductor module includes: a mounting substrate including a mounting surface; a semiconductor element disposed on the mounting surface; a housing for the semiconductor element; a lid fixed to the housing and facing the mounting surface; an insulating sealing material disposed in a space inside the housing and sealing the semiconductor element; and a first adsorbent disposed between the lid and the insulating sealing material and is swollen by adsorption.

A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.

Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A solder thermal interface material (STIM) may be coupled with the die such that the die is between the STIM and the package substrate. An integrated heat spreader (IHS) may be coupled with the STIM such that the STIM is between the IHS and the die, and the IHS may include a feature that is to control bleed-out of the STIM during STIM reflow based on surface tension of the STIM. Other embodiments may be described or claimed.

The present disclosure relates to a semiconductor device package, which includes a carrier, a lid, a first adhesive layer and a constraint structure. The carrier includes a surface and a first conductive pad on the surface of the carrier. The lid includes a first portion and a second portion separated from the first portion on the surface of the carrier. The first conductive pad is disposed between the first portion of the lid and the surface of the carrier. The first adhesive layer includes a first portion between the first portion of the lid and the first conductive pad. The constraint structure surrounds the first adhesive layer.

Disclosed herein is a device having a shaped seal ring comprising a workpiece, the workpiece comprising at least one dielectric layer disposed on a first side of a substrate, a seal ring disposed in the at least one dielectric layer, and at least one groove in the seal ring. A lid is disposed over the workpiece, the workpiece extending into a recess in the lid and a first thermal interface material (TIM) contacts the seal ring and the lid, with the first TIM extending into the at least one groove. The workpiece is mounted to the package carrier. A die is mounted over a first side of workpiece and disposed in the recess. A first underfill a disposed under the die and a second underfill is disposed between the workpiece and the package carrier. The first TIM is disposed between the first underfill and the second underfill.

An electronics package includes a thermal lid over a flip chip component such that the thermal lid is in contact with a surface of a flip chip component and one or more thermal vias in a substrate on which the flip chip component is mounted. The thermal lid dissipates heat from the flip chip component by way of the thermal vias to improve the thermal performance of the electronics package.