Disclosed herein are microelectronic assemblies with integrated perovskite layers, and related devices and methods. For example, in some embodiments, a microelectronic assembly may include an organic package substrate portion having a surface with a conductive layer, and a perovskite conductive layer on the conductive layer. In some embodiments, a microelectronic assembly may include an organic package substrate portion having a surface with a conductive layer, a perovskite conductive layer having a first crystalline structure on the conductive layer, and a perovskite dielectric layer having a second crystalline structure on the perovskite conductive layer. In some embodiments, the first and second crystalline structures have a same orientation.

A package structure includes a wiring structure, at least one electronic device, a reinforcement structure, a plurality of conductive vias and an encapsulant. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The electronic device is electrically connected to the wiring structure. The reinforcement structure is disposed on a surface of the wiring structure, and includes a thermoset material. The conductive vias is disposed in the reinforcement structure. The encapsulant covers the electronic device.

A semiconductor device package includes a first passive component having a first surface and a second passive component having a second surface facing the first surface of the first passive component. The first surface has a recessing portion and the second surface includes a protruding portion within the recessing portion of the first surface of the first passive component. A contour of the protruding portion and a contour of the recessing portion are substantially matched. A method of manufacturing a semiconductor device package is also disclosed.

An electronic component-embedded substrate includes a first wiring layer, a first electronic component disposed on the first wiring layer, a first insulating material covering at least a portion of each of the first wiring layer and the first electronic component, a second wiring layer disposed on the first insulating material, a second electronic component disposed on the second wiring layer and connected to the first electronic component in an electrical parallel connection, a second insulating material disposed on the first insulating material and covering at least a portion of each of the second wiring layer and the second electronic component, and a first via penetrating through the first insulating material and connecting the first electronic component and the second wiring layer.

An integrated circuit (IC) package comprises a semiconductor die, a leadframe comprising a plurality of leads coupled to bond pads on the semiconductor die, and an electrically conductive member electrically coupled to the leadframe. A magnetic mold compound encapsulates the electrically conductive member to form an inductor. A non-magnetic mold compound encapsulates the semiconductor die, the leadframe, and the magnetic mold compound.

A package structure including a first redistribution circuit structure, a semiconductor die, first antennas and second antennas is provided. The semiconductor die is located on and electrically connected to the first redistribution circuit structure. The first antennas and the second antennas are located over the first redistribution circuit structure and electrically connected to the semiconductor die through the first redistribution circuit structure. A first group of the first antennas are located at a first position, a first group of the second antennas are located at a second position, and the first position is different from the second position in a stacking direction of the first redistribution circuit structure and the semiconductor die.

A semiconductor package includes: a connection structure having first and second surfaces opposing each other and including a redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; a passivation layer disposed on the second surface of the connection structure and having a plurality of first and second openings exposing, respectively, first and second regions of the redistribution layer; and a plurality of underbump metal layers connected to the first region of the redistribution layer through the plurality of first openings, respectively.

A semiconductor device can comprise a substrate dielectric structure and a substrate conductive structure that traverses the substrate dielectric structure and comprises first and second substrate terminals; an electronic component with a component terminal coupled to the first substrate terminal; and a first antenna element with a first element terminal coupled to the second substrate terminal, a first element head side adjacent a first antenna pattern, a first element base side opposite the first element side, and a first element sidewall. The first element terminal can be exposed from the first element dielectric structure at the first element base side or at the first element sidewall. The first antenna pattern can be coupled to the substrate through the first element terminal. The substrate conductive structure can couple the first antenna element to the electronic component. Other examples and methods are also disclosed.

A semiconductor device package includes a first substrate, a dielectric layer, a thin film transistor (TFT) and an electronic component. The first substrate has a first surface and a second surface opposite to the first surface. The dielectric layer is disposed on the first surface of the first substrate. The dielectric layer has a first surface facing away from the first substrate and a second surface opposite to the first surface. The TFT layer is disposed on the dielectric layer. The electronic component is disposed on the second surface of the first substrate. A roughness of the first surface of the dielectric layer is less than a roughness of the first surface of the first substrate.

A package structure including a first redistribution circuit structure, a semiconductor die, first antennas and second antennas is provided. The semiconductor die is located on and electrically connected to the first redistribution circuit structure. The first antennas and the second antennas are located over the first redistribution circuit structure and electrically connected to the semiconductor die through the first redistribution circuit structure. A first group of the first antennas are located at a first position, a first group of the second antennas are located at a second position, and the first position is different from the second position in a stacking direction of the first redistribution circuit structure and the semiconductor die.