A semiconductor laser element includes: a substrate; and a laser array portion that includes a plurality of light emitting portions arranged side by side, and is stacked above the substrate, wherein a stacked body of the substrate and the laser array portion includes a pair of resonator end faces on opposite faces, and a groove portion that extends from the laser array portion into the substrate is provided on at least one of the pair of resonator end faces between two adjacent light emitting portions among the plurality of light emitting portions.

Included are: an underlying substrate including a first surface; a semiconductor element layer dividable into a plurality of element portions, the semiconductor element layer being located on the first surface of the underlying substrate; and a support substrate including a second surface on which the semiconductor element layer is located, the second surface facing the first surface, the semiconductor element layer being located on the second surface. The support substrate and the semiconductor element layer include a weak portion used to divide the semiconductor element layer into the plurality of element portions.

A light emitting device according to an embodiment of the present disclosure includes: a semi-insulating substrate having a first surface and a second surface that are opposed to each other; a first semiconductor layer that is stacked on the first surface of the semi-insulating substrate and has a lattice plane non-continuous to the semi-insulating substrate; and a semiconductor stacked body that is stacked above the first surface of the semi-insulating substrate with the semiconductor layer interposed in between. The first semiconductor layer has a first electrical conduction type. The semiconductor stacked body has a light emitting region configured to emit laser light.

The semiconductor laser element includes: a substrate; a first semiconductor layer disposed above a main surface of the substrate; an active layer that is disposed above the first semiconductor layer and generates light; and a second semiconductor layer) disposed above the active layer. In a top view of a front-side end portion of the semiconductor laser element from which the light is emitted, an end surface of the second semiconductor layer includes an inclined portion with respect to an end surface of the first semiconductor layer.

A light emitting device according to an embodiment of the present disclosure includes: a semi-insulating substrate; a semiconductor layer; a semiconductor stacked body; a buried layer; and a non-continuous lattice plane. The semi-insulating substrate has a first surface and a second surface that are opposed to each other. The semiconductor layer is stacked on the first surface of the semi-insulating substrate. The semiconductor layer has electrical conductivity. The semiconductor stacked body is stacked above the first surface of the semi-insulating substrate with the semiconductor layer interposed in between. The semiconductor stacked body has a light emitting region and includes a ridge section on the semi-insulating substrate side. The light emitting region is configured to emit laser light. The buried layer is provided around the ridge section of the semiconductor stacked body. The non-continuous lattice plane is provided between the semi-insulating substrate and the semiconductor stacked body.

A light emitting device according to an embodiment of the present disclosure includes: a semi-insulating substrate; a semiconductor layer; a semiconductor stacked body; a buried layer; and a non-continuous lattice plane. The semi-insulating substrate has a first surface and a second surface that are opposed to each other. The semiconductor layer is stacked on the first surface of the semi-insulating substrate. The semiconductor layer has electrical conductivity. The semiconductor stacked body is stacked above the first surface of the semi-insulating substrate with the semiconductor layer interposed in between. The semiconductor stacked body has a light emitting region and includes a ridge section on the semi-insulating substrate side. The light emitting region is configured to emit laser light. The buried layer is provided around the ridge section of the semiconductor stacked body. The non-continuous lattice plane is provided between the semi-insulating substrate and the semiconductor stacked body.

A Vertical Cavity Surface Emitting Laser (VCSEL) including a light emitting III-nitride active region including quantum wells (QWs), wherein each of the quantum wells have a thickness of more than 8 nm, a cavity length of at least 7 λ, or at least 20 λ, where lambda is a peak wavelength of the light emitted from the active region, layers with reduced surface roughness, a tunnel junction intracavity contact. The VCSEL is flip chip bonded using In—Au bonding. This is the first report of a VCSEL capable of continuous wave operation.

A Vertical Cavity Surface Emitting Laser (VCSEL) including a light emitting III-nitride active region including quantum wells (QWs), wherein each of the quantum wells have a thickness of more than 8 nm, a cavity length of at least 7 λ, or at least 20 λ, where lambda is a peak wavelength of the light emitted from the active region, layers with reduced surface roughness, a tunnel junction intracavity contact. The VCSEL is flip chip bonded using In—Au bonding. This is the first report of a VCSEL capable of continuous wave operation.

Methods, devices, and systems for double-sided cooling of laser diodes are provided. In one aspect, a laser diode assembly includes a first heat sink, a plurality of submounts spaced apart from one another on the first heat sink, a plurality of laser diodes, and a second heat sink on top sides of the plurality of laser diodes. Each laser diode includes a corresponding active layer between a first-type doped semiconductor layer and a second-type doped semiconductor layer. A bottom side of each laser diode is positioned on a different corresponding submount of the plurality of submounts. The plurality of laser diode are electrically connected in series.

Methods for forming an at least partially oxidized confinement layer of a semiconductor device and corresponding semiconductor devices are provided. The method comprises forming two or more layers of a semiconductor device on a substrate. The layers include an exposed layer and a to-be-oxidized layer. The to-be-oxidized layer is disposed between the substrate and the exposed layer. The method further comprises etching, using a masking process, a pattern of holes that extend through the exposed layer at least to a first surface of the to-be-oxidized layer. Each hole of the pattern of holes extends in a direction that is transverse to a level plane that is parallel to the first surface of the to-be-oxidized layer. The method further comprises oxidizing the to-be-oxidized layer through the pattern of holes by exposing the two or more layers of the semiconductor device to an oxidizing gas to form a confinement layer.