Patent classifications
H01S5/18308
VERTICAL CAVITY SURFACE EMITTING DEVICE
A vertical cavity surface emitting device includes a substrate, a first multilayer film reflecting mirror, a first semiconductor layer having a first conductivity type, a light-emitting layer, a second semiconductor layer having a second conductivity type opposite of the first conductivity type, and having an upper surface with a projection, an insulating layer that covers the upper surface of the second semiconductor layer and has an opening that exposes the second semiconductor layer on the upper surface of the projection terminated on the upper surface of the projection of the second semiconductor layer, a transmissive electrode layer that covers the upper surface of the second semiconductor layer exposed from the opening of the insulating layer and is formed on the insulating layer, and a second multilayer film reflecting mirror formed on the transmissive electrode layer and constituting a resonator together with the first multilayer film reflecting mirror.
Vertical cavity surface emitting laser device
A VCSEL device includes an N-type metal substrate and laser-emitting units on the N-type metal substrate. Each laser-emitting unit includes an N-type contact layer in contact with the N-type metal substrate; an N-type Bragg reflector layer in contact with the N-type contact layer; a P-type Bragg reflector layer above the N-type Bragg reflector layer; an active emitter layer between the P-type Bragg reflector layer and the N-type Bragg reflector layer; a current restriction layer between the active emitter layer and the P-type Bragg reflector layer; a P-type contact layer in contact with the P-type Bragg reflector layer; and an insulation sidewall surrounding all edges of the N-type and P-type Bragg reflector layers, the N-type and P-type contact layers, the active emitter layer and the current restriction layer. A P-type metal substrate has through holes each aligned with a current restriction hole of a corresponding laser-emitting unit.
Vertical-cavity surface-emitting laser fabrication on large wafer
Methods for fabricating vertical cavity surface emitting lasers (VCSELs) on a large wafer are provided. An un-patterned epi layer form is bonded onto a first reflector form. The first reflector form includes a first reflector layer and a wafer of a first substrate type. The un-patterned epi layer form includes a plurality of un-patterned layers on a wafer of a second substrate type. The first and second substrate types have different thermal expansion coefficients. A resulting bonded blank is substantially non-varying in a plane that is normal to an intended emission direction of the VCSEL. A first regrowth is performed to form first regrowth layers, some of which are patterned to form a tunnel junction pattern. A second regrowth is performed to form second regrowth layers. A second reflector form is bonded onto the second regrowth layers, wherein the second reflector form includes a second reflector layer.
Vertical-cavity surface-emitting laser with dense epi-side contacts
An emitter may include a substrate, a conductive layer on at least a bottom surface of a trench, and a first metal layer to provide a first electrical contact of the emitter on an epitaxial side of the substrate. The first metal layer may be within the trench such that the first metal layer contacts the conductive layer within the trench. The emitter may further include a second metal layer to provide a second electrical contact of the emitter on the epitaxial side of the substrate, and an isolation implant to block lateral current flow between the first electrical contact and the second electrical contact.
OPTIMIZING A LAYOUT OF AN EMITTER ARRAY
A closely spaced emitter array may include a first emitter comprising a first plurality of structures and a second emitter, adjacent to the first emitter, comprising a second plurality of structures. The first emitter and the second emitter may be configured in the closely spaced emitter array such that different types of structures between the first plurality of structures and the second plurality of structures do not overlap while maintaining close spacing between the first emitter and the second emitter.
SURFACE EMITTING LASER AND METHOD FOR MANUFACTURING THE SAME
A surface emitting laser includes a first reflective layer, an active layer provided on the first reflective layer, and a second reflective layer provided on the active layer. The first reflective layer, the active layer, and the second reflective layer form a mesa, and the mesa has an electrically insulating region and an electrically conductive region. The electrically insulating region is positioned at a center portion of the mesa in a surface direction, and the electrically conductive region includes the first reflective layer, the active layer, and the second reflective layer and is positioned outside the electrically insulating region in such a manner as to surround the electrically insulating region.
SYSTEM AND METHOD FOR GENERATING AN OPTICAL SIGNAL
To address the need to excite lasers at a high frequency while minimizing electrical parasitic components, the present invention embraces a system and method of exciting a laser using a direct injection of an electron beam. The system may include a low voltage electron emission device made of one or more electron sources. When the device is activated, an electrical field is applied to the tip of each electron source, causing the electron source to emit a stream of electrons. The electrons are directed into a VCSEL, causing it to emit an optical signal. In another aspect, a system for random number generation is provided. The system may also include a processor that receives a measurement of an initial random value, executes an algorithm, where at least one input of the algorithm is the initial random value, and determines a final random value.
OPTOELECTRONIC SEMICONDUCTOR CHIP COMPRISING A CONTACT ELEMENT AND METHOD OF MANUFACTURING AN OPTOELECTRONIC SEMICONDUCTOR CHIP
An optoelectronic semiconductor chip comprises a semiconductor body including a plurality of active regions configured to generate electromagnetic radiation, the plurality of active regions being arranged in a horizontal plane. The optoelectronic semiconductor chip further comprises a conductive member configured to electrically connect at least two adjacent ones of the active regions with each other, the conductive member being arranged over a first main surface of the semiconductor body. The optoelectronic semiconductor chip further comprises a contact element extending from the first main surface to a second main surface of the semiconductor body and being electrically connected to at least one of the active regions via a contact material over the first main surface, and an optical element arranged over the first main surface of the semiconductor body.
Light emitting element
A light emitting element according to the present disclosure includes a first light reflecting layer 41, a laminated structure 20, and a second light reflecting layer 42 laminated to each other. The laminated structure 20 includes a first compound semiconductor layer 21, a light emitting layer 23, and a second compound semiconductor layer 22 laminated to each other from a side of the first light reflecting layer. Light from the laminated structure 20 is emitted to an outside via the first light reflecting layer 41 or the second light reflecting layer 42. The first light reflecting layer 41 has a structure in which at least two types of thin films 41A and 41B are alternately laminated to each other in plural numbers. A film thickness modulating layer 80 is provided between the laminated structure 20 and the first light reflecting layer 41.
Fabrication of low-cost long wavelength VCSEL with optical confinement control
Several VCSEL devices for long wavelength applications in wavelength range of 1200-1600 nm are described. These devices include an active region between a semiconductor DBR on a GaAs wafer and a dielectric DBR regrown on the active region. The active region includes multi-quantum layers (MQLs) confined between the active n-InP and p-InAlAs layers and a tunnel junction layer above the MQLs. The semiconductor DBR is fused to the bottom of the active region by a wafer bonding process. The design simplifies integrating the reflectors and the active region stack by having only one wafer bonding followed by regrowth of the other layers including the dielectric DBR. An air gap is fabricated either in an n-InP layer of the active region or in an air gap spacer layer on top of the semiconductor DBR. The air gap enhances optical confinement of the VCSEL. The air gap may also contain a grating.