Patent classifications
H01S5/18341
LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME
A light emitting device, includes a selective growth mask layer 44; a first light reflection layer 41 thinner than the selective growth mask layer 44; a laminated structure including a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22, the first compound semiconductor layer 21 being formed on the first light reflection layer 41; and a second electrode 32 formed on the second compound semiconductor layer 22, and a second light reflection layer 42, in which the second light reflection layer 42 is opposed to the first light reflection layer 41, and the second light reflection layer is not formed on an upper side of the selective growth mask layer 44.
TUNABLE WAVELENGTH GAIN CHIP ARRAY FOR SENSING AND COMMUNICATION
An array of surface-emitting gain chips includes a common substrate, plural gain chips formed on the common substrate, each configured to generate a light beam, plural optical couplers, each located on a top surface of a corresponding gain chip of the plural gain chips, plural optical fibers, each connected with one end to a corresponding optical coupler of the plurality of optical couplers, an array wide optical coupler connected to another end of the plural optical fibers, and a single optical fiber connected to the array wide optical coupler and configured to output the combined light beams.
Nitride semiconductor light-emitting device with periodic gain active layers
A nitride semiconductor light-emitting device with periodic gain active layers includes an n-type semiconductor layer, a p-type semiconductor layer and a resonator. The device further includes a plurality of active layers disposed between the n-type and p-type semiconductor layers so as to correspond to a peak intensity position of light existing in the resonator and at least one interlayer disposed between the active layers. The active layer disposed at the p-type semiconductor layer side has a larger light emission intensity than the active layer disposed at the n-type semiconductor layer side.
Integrated digital laser
A laser device includes: a substrate formed from material transparent at a laser wavelength; a first reflecting layer to reflect at least some incident radiation at the laser wavelength; a layer including a gain medium for providing stimulated emission of radiation at the laser wavelength, and positioned between the first reflecting layer and the substrate; a second reflecting layer on an opposite side of the substrate from the first reflecting layer to reflect at least some incident radiation at the laser wavelength; a spatial light modulator in an optical cavity comprising the first and second reflecting layers, and comprising an array of elements each corresponding to a different path for radiation in the optical cavity; and a computer controller that, during operation, causes the spatial light modulator to selectively vary an intensity or phase of radiation in the optical cavity to provide variable transverse spatial mode output of the radiation.
VERTICAL-CAVITY SURFACE-EMITTING LASER WITH DENSE EPI-SIDE CONTACTS
An emitter may include a substrate, a conductive layer on at least a bottom surface of a trench, and a first metal layer to provide a first electrical contact of the emitter on an epitaxial side of the substrate. The first metal layer may be within the trench such that the first metal layer contacts the conductive layer within the trench. The emitter may further include a second metal layer to provide a second electrical contact of the emitter on the epitaxial side of the substrate, and an isolation implant to block lateral current flow between the first electrical contact and the second electrical contact.
Rigid High Power and High Speed Lasing Grid Structures
Disclosed herein are various embodiments for stronger and more powerful high speed laser arrays. For example, an apparatus is disclosed that comprises an active mesa structure in combination with an electrical waveguide, wherein the active mesa structure comprises a plurality of laser regions within the active mesa structure itself, each laser region of the active mesa structure being electrically isolated within the active mesa structure itself relative to the other laser regions of the active mesa structure.
SURFACE EMITTING LASER DEVICE
Provided is a surface emitting laser device including a plurality of surface emitting laser elements and capable of significantly reducing the crosstalk of light and the formation of a dark line. The surface emitting laser device includes: a mounting substrate; a surface emitting laser array including a plurality of surface emitting laser elements arranged side by side on the mounting substrate; a plurality of light absorption layers formed on the plurality of surface emitting laser elements, respectively, and each including an opening; and a plurality of wavelength conversion plates formed on the plurality of light absorption layers, respectively, and each including a fluorescent plate and a light reflection film covering a side surface of the fluorescent plate.
RADIATION EMITTER
A method of fabricating at least one radiation emitter including fabricating a layer stack that includes a first reflector, an active region, an oxidizable layer, and a second reflector; and locally removing the layer stack, and thereby forming at least one mesa. The mesa includes the first reflector, the active region, the oxidizable layer and the second reflector. Before or after locally removing the layer stack and forming the mesa the following steps are carried out: vertically etching at least three blind holes inside the layer stack, wherein the blind holes vertically extend to and expose the oxidizable layer; and oxidizing the oxidizable layer via the sidewalls of the blind holes in lateral direction. An oxidation front radially moves outwards from each hole. The etching is terminated before the entire oxidizable layer is oxidized, thereby forming at least one unoxidized aperture that is limited by at least three oxidation fronts.
VERTICAL CAVITY LIGHT-EMITTING ELEMENT AND METHOD FOR MANUFACTURING THE SAME
A vertical cavity light-emitting element includes: a first-conductivity-type semiconductor layer; an active layer; a second-conductivity-type semiconductor layer that are formed in this order on a first reflector; an insulating current confinement layer formed on the second-conductivity-type semiconductor layer; a through opening formed in the current confinement layer; a transparent electrode covering the through opening and the current confinement layer and being in contact with the second-conductivity-type semiconductor layer via the through opening; and a second reflector formed on the transparent electrode. At least one of a portion of the transparent electrode corresponding to the opening and a portion of the second-conductivity-type semiconductor layer corresponding to the opening that are in contact with each other in the through opening includes a first resistive region disposed along an inner circumference of the through opening and a second resistive region disposed on a center region of the through opening.
GaN-based VCSEL chip based on porous DBR and manufacturing method of the same
A GaN-based VCSEL chip based on porous DBR and a manufacturing method of the same, wherein the chip includes: a substrate; a buffer layer formed on the substrate; a bottom porous DBR layer formed on the buffer layer; an n-type doped GaN layer formed on the bottom porous DBR layer, which is etched downward on its periphery to form a mesa; an active layer formed on the n-type doped GaN layer; an electron blocking layer formed on the active layer; a p-type doped GaN layer formed on the electron blocking layer; a current limiting layer formed on the p-type doped GaN layer with a current window formed at a center thereof, wherein the current limiting layer covers sidewalls of the active layer, the electron blocking layer and the convex portion of the n-type doped GaN layer; a transparent electrode formed on the p-type doped GaN layer; an n-electrode formed on the mesa of the n-type doped GaN layer; a p-electrode formed on the transparent electrode with a recess formed therein; and a dielectric DBR layer formed on the transparent electrode in the recess of the p-electrode.